radeonsi/compute: add buffers to the CS directly

Packets are emitted immediately anyway.

Acked-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák 2015-09-06 15:49:55 +02:00
parent 2176b3b09f
commit 6a684ff67e

View file

@ -294,9 +294,10 @@ static void si_launch_grid(
shader->scratch_bytes_per_wave *
num_waves_for_scratch);
si_pm4_add_bo(pm4, shader->scratch_bo,
RADEON_USAGE_READWRITE,
RADEON_PRIO_SHADER_RESOURCE_RW);
radeon_add_to_buffer_list(&sctx->b, &sctx->b.rings.gfx,
shader->scratch_bo,
RADEON_USAGE_READWRITE,
RADEON_PRIO_SHADER_RESOURCE_RW);
scratch_buffer_va = shader->scratch_bo->gpu_address;
}
@ -309,8 +310,8 @@ static void si_launch_grid(
kernel_args_va = input_buffer->gpu_address;
kernel_args_va += kernel_args_offset;
si_pm4_add_bo(pm4, input_buffer, RADEON_USAGE_READ,
RADEON_PRIO_SHADER_DATA);
radeon_add_to_buffer_list(&sctx->b, &sctx->b.rings.gfx, input_buffer,
RADEON_USAGE_READ, RADEON_PRIO_SHADER_DATA);
si_pm4_set_reg(pm4, R_00B900_COMPUTE_USER_DATA_0, kernel_args_va);
si_pm4_set_reg(pm4, R_00B900_COMPUTE_USER_DATA_0 + 4, S_008F04_BASE_ADDRESS_HI (kernel_args_va >> 32) | S_008F04_STRIDE(0));
@ -337,7 +338,9 @@ static void si_launch_grid(
if (!buffer) {
continue;
}
si_pm4_add_bo(pm4, buffer, RADEON_USAGE_READWRITE, RADEON_PRIO_SHADER_RESOURCE_RW);
radeon_add_to_buffer_list(&sctx->b, &sctx->b.rings.gfx, buffer,
RADEON_USAGE_READWRITE,
RADEON_PRIO_SHADER_RESOURCE_RW);
}
/* This register has been moved to R_00CD20_COMPUTE_MAX_WAVE_ID
@ -358,7 +361,8 @@ static void si_launch_grid(
#if HAVE_LLVM >= 0x0306
shader_va += pc;
#endif
si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_SHADER_DATA);
radeon_add_to_buffer_list(&sctx->b, &sctx->b.rings.gfx, shader->bo,
RADEON_USAGE_READ, RADEON_PRIO_SHADER_DATA);
si_pm4_set_reg(pm4, R_00B830_COMPUTE_PGM_LO, shader_va >> 8);
si_pm4_set_reg(pm4, R_00B834_COMPUTE_PGM_HI, shader_va >> 40);