virgl: Apply integer op fix only for ALU ops and clear modifiers

For texture fetches and buffer load the fix is not needed,
and the override creates faulty TGSI.

In addition remove all modifiers from the src in the additional mov
instruction.

Fixes: d1c7a7b131
  virgl: Add an extra mov for int outputs from constant and immediate inputs

v2: Move workaround after the use of
    virgl_tgsi_rewrite_src_for_input_temp (Emma)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15896>
This commit is contained in:
Gert Wollny 2022-04-12 17:53:12 +02:00 committed by Marge Bot
parent 29564031cf
commit 6a264e7024

View file

@ -329,27 +329,6 @@ virgl_tgsi_transform_instruction(struct tgsi_transform_context *ctx,
inst->Src[0].Register.Index = vtctx->src_temp; inst->Src[0].Register.Index = vtctx->src_temp;
} }
/* virglrenderer doesn't resolve non-float output write properly,
* so we have to first write to a temporary */
if ((inst->Src[0].Register.File == TGSI_FILE_CONSTANT ||
inst->Src[0].Register.File == TGSI_FILE_IMMEDIATE) &&
inst->Dst[0].Register.File == TGSI_FILE_OUTPUT &&
tgsi_opcode_infer_dst_type(inst->Instruction.Opcode, 0) != TGSI_TYPE_FLOAT) {
struct tgsi_full_instruction op_to_temp = *inst;
op_to_temp.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
op_to_temp.Dst[0].Register.Index = vtctx->src_temp;
ctx->emit_instruction(ctx, &op_to_temp);
inst->Instruction.Opcode = TGSI_OPCODE_MOV;
inst->Src[0].Register.File = TGSI_FILE_TEMPORARY;
inst->Src[0].Register.Index = vtctx->src_temp;
inst->Src[0].Register.Indirect = 0;
inst->Src[0].Register.SwizzleX = 0;
inst->Src[0].Register.SwizzleY = 1;
inst->Src[0].Register.SwizzleZ = 2;
inst->Src[0].Register.SwizzleW = 3;
}
for (unsigned i = 0; i < inst->Instruction.NumDstRegs; i++) { for (unsigned i = 0; i < inst->Instruction.NumDstRegs; i++) {
/* virglrenderer would fail to compile on clipdist, clipvertex, and some /* virglrenderer would fail to compile on clipdist, clipvertex, and some
* two-sided-related color writes without a full writemask. So, we write * two-sided-related color writes without a full writemask. So, we write
@ -405,6 +384,30 @@ virgl_tgsi_transform_instruction(struct tgsi_transform_context *ctx,
} }
ctx->emit_instruction(ctx, inst); ctx->emit_instruction(ctx, inst);
/* virglrenderer doesn't resolve non-float output write properly,
* so we have to first write to a temporary */
if ((inst->Src[0].Register.File == TGSI_FILE_CONSTANT ||
inst->Src[0].Register.File == TGSI_FILE_IMMEDIATE) &&
!tgsi_get_opcode_info(inst->Instruction.Opcode)->is_tex &&
!tgsi_get_opcode_info(inst->Instruction.Opcode)->is_store &&
inst->Dst[0].Register.File == TGSI_FILE_OUTPUT &&
tgsi_opcode_infer_dst_type(inst->Instruction.Opcode, 0) != TGSI_TYPE_FLOAT) {
struct tgsi_full_instruction op_to_temp = *inst;
op_to_temp.Dst[0].Register.File = TGSI_FILE_TEMPORARY;
op_to_temp.Dst[0].Register.Index = vtctx->src_temp;
ctx->emit_instruction(ctx, &op_to_temp);
inst->Instruction.Opcode = TGSI_OPCODE_MOV;
inst->Instruction.NumSrcRegs = 1;
memset(&inst->Src[0], 0, sizeof(inst->Src[0]));
inst->Src[0].Register.File = TGSI_FILE_TEMPORARY;
inst->Src[0].Register.Index = vtctx->src_temp;
inst->Src[0].Register.SwizzleY = 1;
inst->Src[0].Register.SwizzleZ = 2;
inst->Src[0].Register.SwizzleW = 3;
}
for (unsigned i = 0; i < inst->Instruction.NumDstRegs; i++) { for (unsigned i = 0; i < inst->Instruction.NumDstRegs; i++) {
if (vtctx->num_writemask_fixups && if (vtctx->num_writemask_fixups &&
inst->Dst[i].Register.File == TGSI_FILE_TEMPORARY && inst->Dst[i].Register.File == TGSI_FILE_TEMPORARY &&