diff --git a/src/gallium/drivers/radeonsi/radeon_bitstream.c b/src/gallium/drivers/radeonsi/radeon_bitstream.c
index 5fec0da3c80..8864b550030 100644
--- a/src/gallium/drivers/radeonsi/radeon_bitstream.c
+++ b/src/gallium/drivers/radeonsi/radeon_bitstream.c
@@ -803,11 +803,20 @@ void radeon_bs_av1_seq(struct radeon_bitstream *bs, uint8_t *obu_bytes, struct p
          radeon_bs_code_fixed_bits(bs, 0, 1); /* enable_ref_frame_mvs */
       }
 
-      radeon_bs_code_fixed_bits(bs, !seq->seq_bits.disable_screen_content_tools, 1); /* seq_choose_screen_content_tools */
-      if (seq->seq_bits.disable_screen_content_tools)
-         radeon_bs_code_fixed_bits(bs, 0, 1); /* seq_force_screen_content_tools */
-      else
-         radeon_bs_code_fixed_bits(bs, 1, 1); /* seq_choose_integer_mv */
+      unsigned seq_choose_screen_content_tools =
+         seq->seq_bits.force_screen_content_tools == AV1_SELECT_SCREEN_CONTENT_TOOLS;
+      radeon_bs_code_fixed_bits(bs, seq_choose_screen_content_tools, 1);
+
+      if (!seq_choose_screen_content_tools)
+         radeon_bs_code_fixed_bits(bs, seq->seq_bits.force_screen_content_tools, 1);
+
+      if (seq->seq_bits.force_screen_content_tools > 0) {
+         unsigned seq_choose_integer_mv = seq->seq_bits.force_integer_mv == AV1_SELECT_INTEGER_MV;
+
+         radeon_bs_code_fixed_bits(bs, seq_choose_integer_mv, 1);
+         if (!seq_choose_integer_mv)
+            radeon_bs_code_fixed_bits(bs, seq->seq_bits.force_integer_mv, 1);
+      }
 
       if (seq->seq_bits.enable_order_hint)
          radeon_bs_code_fixed_bits(bs, seq->order_hint_bits - 1, 3); /* order_hint_bits_minus_1 */
diff --git a/src/gallium/drivers/radeonsi/radeon_bitstream.h b/src/gallium/drivers/radeonsi/radeon_bitstream.h
index 9f08a20a1d5..af3f9cc3791 100644
--- a/src/gallium/drivers/radeonsi/radeon_bitstream.h
+++ b/src/gallium/drivers/radeonsi/radeon_bitstream.h
@@ -10,6 +10,9 @@
 #include "pipe/p_video_state.h"
 #include "winsys/radeon_winsys.h"
 
+#define AV1_SELECT_SCREEN_CONTENT_TOOLS  2
+#define AV1_SELECT_INTEGER_MV            2
+
 struct radeon_bitstream {
    bool emulation_prevention;
    uint32_t shifter;
diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc.c
index d12503b906d..0f284540d07 100644
--- a/src/gallium/drivers/radeonsi/radeon_vcn_enc.c
+++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc.c
@@ -929,15 +929,12 @@ static void radeon_vcn_enc_av1_get_spec_misc_param(struct radeon_encoder *enc,
          (pic->quantization.u_dc_delta_q != pic->quantization.v_dc_delta_q) ||
          (pic->quantization.u_ac_delta_q != pic->quantization.v_ac_delta_q);
 
-   if (enc->enc_pic.disable_screen_content_tools) {
-       enc->enc_pic.force_integer_mv  = 0;
-       enc->enc_pic.av1_spec_misc.palette_mode_enable = 0;
-   }
-
-   if (enc->enc_pic.force_integer_mv)
+   if (pic->allow_screen_content_tools && pic->force_integer_mv)
       enc->enc_pic.av1_spec_misc.mv_precision = RENCODE_AV1_MV_PRECISION_FORCE_INTEGER_MV;
-   else
+   else if (pic->allow_high_precision_mv)
       enc->enc_pic.av1_spec_misc.mv_precision = RENCODE_AV1_MV_PRECISION_ALLOW_HIGH_PRECISION;
+   else
+      enc->enc_pic.av1_spec_misc.mv_precision = RENCODE_AV1_MV_PRECISION_DISALLOW_HIGH_PRECISION;
 }
 
 static void radeon_vcn_enc_av1_get_rc_param(struct radeon_encoder *enc,
@@ -1054,8 +1051,6 @@ static void radeon_vcn_enc_av1_get_param(struct radeon_encoder *enc,
    enc_pic->pic_width_in_luma_samples = pic->seq.pic_width_in_luma_samples;
    enc_pic->pic_height_in_luma_samples = pic->seq.pic_height_in_luma_samples;
    enc_pic->enable_error_resilient_mode = pic->error_resilient_mode;
-   enc_pic->force_integer_mv = pic->force_integer_mv;
-   enc_pic->disable_screen_content_tools = !pic->allow_screen_content_tools;
    enc_pic->is_obu_frame = pic->enable_frame_obu;
    enc_pic->av1_enc_params.cur_order_hint = pic->order_hint;
 
diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc.h b/src/gallium/drivers/radeonsi/radeon_vcn_enc.h
index ac4eb2086e9..9638464de36 100644
--- a/src/gallium/drivers/radeonsi/radeon_vcn_enc.h
+++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc.h
@@ -127,8 +127,6 @@ struct radeon_enc_pic {
       struct {
          struct {
             uint32_t enable_error_resilient_mode:1;
-            uint32_t force_integer_mv:1;
-            uint32_t disable_screen_content_tools:1;
             uint32_t is_obu_frame:1;
          };
          uint32_t *copy_start;
diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc_4_0.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc_4_0.c
index 97edcc42a44..984283cf470 100644
--- a/src/gallium/drivers/radeonsi/radeon_vcn_enc_4_0.c
+++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc_4_0.c
@@ -181,7 +181,6 @@ unsigned int radeon_enc_write_sequence_header(struct radeon_encoder *enc, uint8_
    struct pipe_av1_enc_seq_param seq = enc->enc_pic.av1.desc->seq;
    seq.pic_width_in_luma_samples = enc->enc_pic.av1.coded_width;
    seq.pic_height_in_luma_samples = enc->enc_pic.av1.coded_height;
-   seq.seq_bits.disable_screen_content_tools = enc->enc_pic.disable_screen_content_tools;
 
    struct radeon_bitstream bs;
    radeon_bs_reset(&bs, out, NULL);
@@ -231,17 +230,11 @@ void radeon_enc_av1_frame_header_common(struct radeon_encoder *enc, struct radeo
    /*  disable_cdf_update  */
    radeon_bs_code_fixed_bits(bs, enc->enc_pic.av1_spec_misc.disable_cdf_update ? 1 : 0, 1);
 
-   bool allow_screen_content_tools = false;
-   if (av1->seq.seq_bits.reduced_still_picture_header || !enc->enc_pic.disable_screen_content_tools) {
-      /*  allow_screen_content_tools  */
-      allow_screen_content_tools = enc->enc_pic.av1_spec_misc.palette_mode_enable ||
-                                   enc->enc_pic.force_integer_mv;
-      radeon_bs_code_fixed_bits(bs, allow_screen_content_tools ? 1 : 0, 1);
-   }
+   if (av1->seq.seq_bits.force_screen_content_tools == AV1_SELECT_SCREEN_CONTENT_TOOLS)
+      radeon_bs_code_fixed_bits(bs, av1->allow_screen_content_tools, 1);
 
-   if (allow_screen_content_tools)
-      /*  force_integer_mv  */
-      radeon_bs_code_fixed_bits(bs, enc->enc_pic.force_integer_mv ? 1 : 0, 1);
+   if (av1->allow_screen_content_tools && av1->seq.seq_bits.force_integer_mv == AV1_SELECT_INTEGER_MV)
+      radeon_bs_code_fixed_bits(bs, av1->force_integer_mv, 1);
 
    if (av1->seq.seq_bits.frame_id_number_present_flag)
       /*  current_frame_id  */
@@ -285,8 +278,7 @@ void radeon_enc_av1_frame_header_common(struct radeon_encoder *enc, struct radeo
          /*  render_height_minus_1  */
          radeon_bs_code_fixed_bits(bs, av1->render_height_minus_1, 16);
       }
-      if (!enc->enc_pic.disable_screen_content_tools &&
-            (enc->enc_pic.av1_spec_misc.palette_mode_enable || enc->enc_pic.force_integer_mv))
+      if (av1->allow_screen_content_tools)
          /*  allow_intrabc  */
          radeon_bs_code_fixed_bits(bs, 0, 1);
    } else {
@@ -330,7 +322,7 @@ void radeon_enc_av1_frame_header_common(struct radeon_encoder *enc, struct radeo
          }
       }
 
-      if (enc->enc_pic.disable_screen_content_tools || !enc->enc_pic.force_integer_mv)
+      if (!av1->force_integer_mv)
          /*  allow_high_precision_mv  */
          radeon_enc_av1_bs_instruction_type(enc, bs, RENCODE_AV1_BITSTREAM_INSTRUCTION_ALLOW_HIGH_PRECISION_MV, 0);
 
diff --git a/src/gallium/frontends/va/picture_av1_enc.c b/src/gallium/frontends/va/picture_av1_enc.c
index e4d37386575..61af1e2f75b 100644
--- a/src/gallium/frontends/va/picture_av1_enc.c
+++ b/src/gallium/frontends/va/picture_av1_enc.c
@@ -559,7 +559,10 @@ static void av1_sequence_header(vlVaContext *context, struct vl_vlc *vlc)
    seq->seq_bits.use_128x128_superblock = av1_f(vlc, 1);
    seq->seq_bits.enable_filter_intra = av1_f(vlc, 1);
    seq->seq_bits.enable_intra_edge_filter = av1_f(vlc, 1);
-   if (!seq->seq_bits.reduced_still_picture_header) {
+   if (seq->seq_bits.reduced_still_picture_header) {
+      seq->seq_bits.force_screen_content_tools = AV1_SELECT_SCREEN_CONTENT_TOOLS;
+      seq->seq_bits.force_integer_mv = AV1_SELECT_INTEGER_MV;
+   } else {
       seq->seq_bits.enable_interintra_compound = av1_f(vlc, 1);
       seq->seq_bits.enable_masked_compound = av1_f(vlc, 1);
       seq->seq_bits.enable_warped_motion = av1_f(vlc, 1);
@@ -571,16 +574,14 @@ static void av1_sequence_header(vlVaContext *context, struct vl_vlc *vlc)
       } else
          seq->seq_bits.enable_ref_frame_mvs = 0;
 
-      seq->seq_bits.disable_screen_content_tools = av1_f(vlc, 1);
-      if (seq->seq_bits.disable_screen_content_tools)
+      if (av1_f(vlc, 1)) /* seq_choose_screen_content_tools */
          seq->seq_bits.force_screen_content_tools = AV1_SELECT_SCREEN_CONTENT_TOOLS;
       else
          seq->seq_bits.force_screen_content_tools = av1_f(vlc, 1);
 
       seq->seq_bits.force_integer_mv = AV1_SELECT_INTEGER_MV;
-      if (seq->seq_bits.force_screen_content_tools) {
-         seq->seq_bits.choose_integer_mv = av1_f(vlc, 1);
-         if (!seq->seq_bits.choose_integer_mv)
+      if (seq->seq_bits.force_screen_content_tools > 0) {
+         if (!av1_f(vlc, 1)) /* seq_choose_integer_mv */
             seq->seq_bits.force_integer_mv = av1_f(vlc, 1);
       }
       if (seq->seq_bits.enable_order_hint)
diff --git a/src/gallium/include/pipe/p_video_state.h b/src/gallium/include/pipe/p_video_state.h
index 17afe10ce27..478da4cc30a 100644
--- a/src/gallium/include/pipe/p_video_state.h
+++ b/src/gallium/include/pipe/p_video_state.h
@@ -1502,14 +1502,12 @@ struct pipe_av1_enc_seq_param
       uint32_t color_description_present_flag:1;
       uint32_t enable_ref_frame_mvs:1;
       uint32_t frame_id_number_present_flag:1;
-      uint32_t disable_screen_content_tools:1;
       uint32_t timing_info_present_flag:1;
       uint32_t equal_picture_interval:1;
       uint32_t decoder_model_info_present_flag:1;
       uint32_t force_screen_content_tools:2;
       uint32_t force_integer_mv:2;
       uint32_t initial_display_delay_present_flag:1;
-      uint32_t choose_integer_mv:1;
       uint32_t still_picture:1;
       uint32_t reduced_still_picture_header:1;
       uint32_t high_bitdepth:1;