freedreno/ir3: introduce ir3_compiler object

Right now, just provides a cleaner way to get at the gpu-id, given the
separation between compiler and context.  But we will need this also to
hold the reg-set for new register allocation.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

src/gallium/drivers/freedreno/Makefile.sources

@@ -121,6 +121,7 @@ ir3_SOURCES := \
 	ir3/instr-a3xx.h \
 	ir3/ir3.c \
 	ir3/ir3_compiler_nir.c \
+	ir3/ir3_compiler.c \
 	ir3/ir3_compiler.h \
 	ir3/ir3_cp.c \
 	ir3/ir3_depth.c \

src/gallium/drivers/freedreno/a3xx/fd3_screen.c

@@ -32,6 +32,7 @@
 #include "fd3_screen.h"
 #include "fd3_context.h"
 #include "fd3_format.h"
+#include "ir3_compiler.h"
 
 static boolean
 fd3_screen_is_format_supported(struct pipe_screen *pscreen,
@@ -103,7 +104,9 @@ fd3_screen_is_format_supported(struct pipe_screen *pscreen,
 void
 fd3_screen_init(struct pipe_screen *pscreen)
 {
-	fd_screen(pscreen)->max_rts = 4;
+	struct fd_screen *screen = fd_screen(pscreen);
+	screen->max_rts = 4;
+	screen->compiler = ir3_compiler_create(screen->gpu_id);
 	pscreen->context_create = fd3_context_create;
 	pscreen->is_format_supported = fd3_screen_is_format_supported;
 }

src/gallium/drivers/freedreno/a4xx/fd4_screen.c

@@ -32,6 +32,7 @@
 #include "fd4_screen.h"
 #include "fd4_context.h"
 #include "fd4_format.h"
+#include "ir3_compiler.h"
 
 static boolean
 fd4_screen_is_format_supported(struct pipe_screen *pscreen,
@@ -100,7 +101,9 @@ fd4_screen_is_format_supported(struct pipe_screen *pscreen,
 void
 fd4_screen_init(struct pipe_screen *pscreen)
 {
-	fd_screen(pscreen)->max_rts = 1;
+	struct fd_screen *screen = fd_screen(pscreen);
+	screen->max_rts = 1;
+	screen->compiler = ir3_compiler_create(screen->gpu_id);
 	pscreen->context_create = fd4_context_create;
 	pscreen->is_format_supported = fd4_screen_is_format_supported;
 }

src/gallium/drivers/freedreno/freedreno_screen.h

@@ -46,7 +46,9 @@ struct fd_screen {
 	uint32_t device_id;
 	uint32_t gpu_id;         /* 220, 305, etc */
 	uint32_t chip_id;        /* coreid:8 majorrev:8 minorrev:8 patch:8 */
-	uint32_t max_rts;
+	uint32_t max_rts;        /* max # of render targets */
+
+	void *compiler;          /* currently unused for a2xx */
 
 	struct fd_device *dev;
 	struct fd_pipe *pipe;

src/gallium/drivers/freedreno/ir3/ir3.c

@@ -66,11 +66,12 @@ void * ir3_alloc(struct ir3 *shader, int sz)
 	return ptr;
 }
 
-struct ir3 * ir3_create(void)
+struct ir3 * ir3_create(struct ir3_compiler *compiler)
 {
 	struct ir3 *shader =
 			calloc(1, sizeof(struct ir3));
 	grow_heap(shader);
+	shader->compiler = compiler;
 	return shader;
 }
 

src/gallium/drivers/freedreno/ir3/ir3.h

@@ -35,6 +35,7 @@
 
 /* low level intermediate representation of an adreno shader program */
 
+struct ir3_compiler;
 struct ir3;
 struct ir3_instruction;
 struct ir3_block;
@@ -324,6 +325,7 @@ static inline int ir3_neighbor_count(struct ir3_instruction *instr)
 struct ir3_heap_chunk;
 
 struct ir3 {
+	struct ir3_compiler *compiler;
 
 	/* Track bary.f (and ldlv) instructions.. this is needed in
 	 * scheduling to ensure that all varying fetches happen before
@@ -367,7 +369,7 @@ struct ir3_block {
 	struct list_head instr_list;
 };
 
-struct ir3 * ir3_create(void);
+struct ir3 * ir3_create(struct ir3_compiler *compiler);
 void ir3_destroy(struct ir3 *shader);
 void * ir3_assemble(struct ir3 *shader,
 		struct ir3_info *info, uint32_t gpu_id);

src/gallium/drivers/freedreno/ir3/ir3_cmdline.c

@@ -216,6 +216,7 @@ int main(int argc, char **argv)
 	const char *filename;
 	struct tgsi_token toks[65536];
 	struct tgsi_parse_context parse;
+	struct ir3_compiler *compiler;
 	struct ir3_shader_variant v;
 	struct ir3_shader_key key = {};
 	const char *info;
@@ -319,8 +320,11 @@ int main(int argc, char **argv)
 		break;
 	}
 
+	/* TODO cmdline option to target different gpus: */
+	compiler = ir3_compiler_create(320);
+
 	info = "NIR compiler";
-	ret = ir3_compile_shader_nir(&v, toks, key);
+	ret = ir3_compile_shader_nir(compiler, &v, toks, key);
 	if (ret) {
 		fprintf(stderr, "compiler failed!\n");
 		return ret;

src/gallium/drivers/freedreno/ir3/ir3_compiler.c

@@ -0,0 +1,43 @@
+/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
+
+/*
+ * Copyright (C) 2015 Rob Clark <robclark@freedesktop.org>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Authors:
+ *    Rob Clark <robclark@freedesktop.org>
+ */
+
+#include "util/ralloc.h"
+
+#include "ir3_compiler.h"
+
+struct ir3_compiler * ir3_compiler_create(uint32_t gpu_id)
+{
+	struct ir3_compiler *compiler = rzalloc(NULL, struct ir3_compiler);
+	compiler->gpu_id = gpu_id;
+	return compiler;
+}
+
+void ir3_compiler_destroy(struct ir3_compiler *compiler)
+{
+	ralloc_free(compiler);
+}

src/gallium/drivers/freedreno/ir3/ir3_compiler.h

@@ -31,7 +31,16 @@
 
 #include "ir3_shader.h"
 
-int ir3_compile_shader_nir(struct ir3_shader_variant *so,
-		const struct tgsi_token *tokens, struct ir3_shader_key key);
+struct ir3_compiler {
+	uint32_t gpu_id;
+};
+
+struct ir3_compiler * ir3_compiler_create(uint32_t gpu_id);
+void ir3_compiler_destroy(struct ir3_compiler *compiler);
+
+int ir3_compile_shader_nir(struct ir3_compiler *compiler,
+		struct ir3_shader_variant *so,
+		const struct tgsi_token *tokens,
+		struct ir3_shader_key key);
 
 #endif /* IR3_COMPILER_H_ */

src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c

@@ -192,11 +192,7 @@ lower_tgsi(const struct tgsi_token *tokens, struct ir3_shader_variant *so)
 		break;
 	}
 
-	if (!so->shader) {
-		/* hack for standalone compiler which does not have
-		 * screen/context:
-		 */
-	} else if (ir3_shader_gpuid(so->shader) >= 400) {
+	if (so->ir->compiler->gpu_id >= 400) {
 		/* a4xx seems to have *no* sam.p */
 		lconfig.lower_TXP = ~0;  /* lower all txp */
 	} else {
@@ -214,11 +210,7 @@ compile_init(struct ir3_shader_variant *so,
 	struct ir3_compile *ctx = rzalloc(NULL, struct ir3_compile);
 	const struct tgsi_token *lowered_tokens;
 
-	if (!so->shader) {
-		/* hack for standalone compiler which does not have
-		 * screen/context:
-		 */
-	} else if (ir3_shader_gpuid(so->shader) >= 400) {
+	if (so->ir->compiler->gpu_id >= 400) {
 		/* need special handling for "flat" */
 		ctx->flat_bypass = true;
 		ctx->levels_add_one = false;
@@ -1919,8 +1911,10 @@ fixup_frag_inputs(struct ir3_compile *ctx)
 }
 
 int
-ir3_compile_shader_nir(struct ir3_shader_variant *so,
-		const struct tgsi_token *tokens, struct ir3_shader_key key)
+ir3_compile_shader_nir(struct ir3_compiler *compiler,
+		struct ir3_shader_variant *so,
+		const struct tgsi_token *tokens,
+		struct ir3_shader_key key)
 {
 	struct ir3_compile *ctx;
 	struct ir3_block *block;
@@ -1930,7 +1924,7 @@ ir3_compile_shader_nir(struct ir3_shader_variant *so,
 
 	assert(!so->ir);
 
-	so->ir = ir3_create();
+	so->ir = ir3_create(compiler);
 
 	assert(so->ir);
 

src/gallium/drivers/freedreno/ir3/ir3_shader.c

@@ -127,7 +127,7 @@ static void
 assemble_variant(struct ir3_shader_variant *v)
 {
 	struct fd_context *ctx = fd_context(v->shader->pctx);
-	uint32_t gpu_id = ir3_shader_gpuid(v->shader);
+	uint32_t gpu_id = v->shader->compiler->gpu_id;
 	uint32_t sz, *bin;
 
 	bin = ir3_shader_assemble(v, gpu_id);
@@ -166,7 +166,7 @@ create_variant(struct ir3_shader *shader, struct ir3_shader_key key)
 		tgsi_dump(tokens, 0);
 	}
 
-	ret = ir3_compile_shader_nir(v, tokens, key);
+	ret = ir3_compile_shader_nir(shader->compiler, v, tokens, key);
 	if (ret) {
 		debug_error("compile failed!");
 		goto fail;
@@ -191,13 +191,6 @@ fail:
 	return NULL;
 }
 
-uint32_t
-ir3_shader_gpuid(struct ir3_shader *shader)
-{
-	struct fd_context *ctx = fd_context(shader->pctx);
-	return ctx->screen->gpu_id;
-}
-
 struct ir3_shader_variant *
 ir3_shader_variant(struct ir3_shader *shader, struct ir3_shader_key key)
 {
@@ -260,6 +253,7 @@ ir3_shader_create(struct pipe_context *pctx, const struct tgsi_token *tokens,
 		enum shader_t type)
 {
 	struct ir3_shader *shader = CALLOC_STRUCT(ir3_shader);
+	shader->compiler = fd_context(pctx)->screen->compiler;
 	shader->pctx = pctx;
 	shader->type = type;
 	shader->tokens = tgsi_dup_tokens(tokens);

src/gallium/drivers/freedreno/ir3/ir3_shader.h

@@ -196,6 +196,8 @@ struct ir3_shader_variant {
 struct ir3_shader {
 	enum shader_t type;
 
+	struct ir3_compiler *compiler;
+
 	struct pipe_context *pctx;
 	const struct tgsi_token *tokens;
 
@@ -212,7 +214,6 @@ void * ir3_shader_assemble(struct ir3_shader_variant *v, uint32_t gpu_id);
 struct ir3_shader * ir3_shader_create(struct pipe_context *pctx,
 		const struct tgsi_token *tokens, enum shader_t type);
 void ir3_shader_destroy(struct ir3_shader *shader);
-uint32_t ir3_shader_gpuid(struct ir3_shader *shader);
 struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
 		struct ir3_shader_key key);
 
@@ -220,6 +221,8 @@ struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
  * Helper/util:
  */
 
+#include "pipe/p_shader_tokens.h"
+
 static inline int
 ir3_find_output(const struct ir3_shader_variant *so, ir3_semantic semantic)
 {