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i965/gen6/gs: Enable transform feedback support in geometry shaders
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
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c66165ab2b
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6947a8a593
2 changed files with 11 additions and 8 deletions
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@ -105,6 +105,12 @@ do_gs_prog(struct brw_context *brw,
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} else {
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/* There are no control data bits in gen6. */
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c.control_data_bits_per_vertex = 0;
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/* If it is using transform feedback, enable it */
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if (prog->TransformFeedback.NumVarying)
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c.prog_data.gen6_xfb_enabled = true;
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else
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c.prog_data.gen6_xfb_enabled = false;
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}
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c.control_data_header_size_bits =
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gp->program.VerticesOut * c.control_data_bits_per_vertex;
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@ -154,10 +154,7 @@ upload_gs_state(struct brw_context *brw)
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GEN6_GS_SO_STATISTICS_ENABLE |
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GEN6_GS_RENDERING_ENABLE);
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/* FIXME: Enable SVBI payload only when TF is enable in SNB for
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* user-provided GS.
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*/
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if (0) {
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if (brw->gs.prog_data->gen6_xfb_enabled) {
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/* GEN6_GS_REORDER is equivalent to GEN7_GS_REORDER_TRAILING
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* in gen7. SNB and IVB specs are the same regarding the reordering of
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* TRISTRIP/TRISTRIP_REV vertices and triangle orientation, so we do
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@ -166,9 +163,6 @@ upload_gs_state(struct brw_context *brw)
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*/
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OUT_BATCH(GEN6_GS_REORDER |
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GEN6_GS_SVBI_PAYLOAD_ENABLE |
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GEN6_GS_SVBI_POSTINCREMENT_ENABLE |
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/* FIXME: prog_data->svbi_postincrement_value instead of 0 */
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(0 << GEN6_GS_SVBI_POSTINCREMENT_VALUE_SHIFT) |
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GEN6_GS_ENABLE);
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} else {
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OUT_BATCH(GEN6_GS_REORDER | GEN6_GS_ENABLE);
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@ -202,7 +196,10 @@ upload_gs_state(struct brw_context *brw)
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const struct brw_tracked_state gen6_gs_state = {
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.dirty = {
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.mesa = _NEW_TRANSFORM | _NEW_PROGRAM_CONSTANTS,
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.brw = BRW_NEW_CONTEXT | BRW_NEW_PUSH_CONSTANT_ALLOCATION,
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.brw = (BRW_NEW_CONTEXT |
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BRW_NEW_PUSH_CONSTANT_ALLOCATION |
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BRW_NEW_GEOMETRY_PROGRAM |
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BRW_NEW_BATCH),
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.cache = (CACHE_NEW_GS_PROG | CACHE_NEW_FF_GS_PROG)
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},
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.emit = upload_gs_state,
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