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i965: Add sanity check for non-compressible texture views

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v2: Fix missing inline declaration

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Topi Pohjolainen 2016-09-07 09:38:11 +03:00
parent 1b6fcc08df
commit 6939532593
1 changed files with 34 additions and 0 deletions
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34
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
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@ -438,6 +438,38 @@ brw_find_matching_rb(const struct gl_framebuffer *fb,
return fb->_NumColorDrawBuffers; return fb->_NumColorDrawBuffers;
} }
static inline bool
brw_texture_view_sane(const struct brw_context *brw,
const struct intel_mipmap_tree *mt, unsigned format)
{
/* There are special cases only for lossless compression. */
if (!intel_miptree_is_lossless_compressed(brw, mt))
return true;
if (isl_format_supports_lossless_compression(brw->intelScreen->devinfo,
format))
return true;
/* Logic elsewhere needs to take care to resolve the color buffer prior
* to sampling it as non-compressed.
*/
if (mt->fast_clear_state != INTEL_FAST_CLEAR_STATE_RESOLVED)
return false;
const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
const unsigned rb_index = brw_find_matching_rb(fb, mt);
if (rb_index == fb->_NumColorDrawBuffers)
return true;
/* Underlying surface is compressed but it is sampled using a format that
* the sampling engine doesn't support as compressed. Compression must be
* disabled for both sampling engine and data port in case the same surface
* is used also as render target.
*/
return brw->draw_aux_buffer_disabled[rb_index];
}
static bool static bool
brw_disable_aux_surface(const struct brw_context *brw, brw_disable_aux_surface(const struct brw_context *brw,
const struct intel_mipmap_tree *mt) const struct intel_mipmap_tree *mt)
@ -592,6 +624,8 @@ brw_update_texture_surface(struct gl_context *ctx,
obj->Target == GL_TEXTURE_CUBE_MAP_ARRAY) obj->Target == GL_TEXTURE_CUBE_MAP_ARRAY)
view.usage |= ISL_SURF_USAGE_CUBE_BIT; view.usage |= ISL_SURF_USAGE_CUBE_BIT;
assert(brw_texture_view_sane(brw, mt, format));
const int flags = const int flags =
brw_disable_aux_surface(brw, mt) ? INTEL_AUX_BUFFER_DISABLED : 0; brw_disable_aux_surface(brw, mt) ? INTEL_AUX_BUFFER_DISABLED : 0;
brw_emit_surface_state(brw, mt, flags, mt->target, view, brw_emit_surface_state(brw, mt, flags, mt->target, view,