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panfrost: Re-order things in panfrost_direct_draw()

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Re-order things in panfrost_direct_draw() so we have all non-HW specific
stuff done first, and then the descriptor emission.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26249>
This commit is contained in:
Boris Brezillon 2023-11-15 14:52:47 +01:00 • committed by Marge Bot
parent 172d4bccd2
commit 691d9747e5
1 changed files with 41 additions and 40 deletions
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81
src/gallium/drivers/panfrost/pan_cmdstream.c
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@ -3648,52 +3648,12 @@ panfrost_direct_draw(struct panfrost_batch *batch,
struct panfrost_compiled_shader *vs = ctx->prog[PIPE_SHADER_VERTEX];
bool idvs = vs->info.vs.idvs;
bool secondary_shader = vs->info.vs.secondary_enable;
UNUSED struct panfrost_ptr tiler, vertex;
if (idvs) {
#if PAN_ARCH >= 9
tiler = pan_pool_alloc_desc(&batch->pool.base, MALLOC_VERTEX_JOB);
#elif PAN_ARCH >= 6
tiler = pan_pool_alloc_desc(&batch->pool.base, INDEXED_VERTEX_JOB);
#else
unreachable("IDVS is unsupported on Midgard");
#endif
} else {
vertex = pan_pool_alloc_desc(&batch->pool.base, COMPUTE_JOB);
tiler = pan_pool_alloc_desc(&batch->pool.base, TILER_JOB);
}
UNUSED unsigned vertex_count =
panfrost_draw_get_vertex_count(batch, info, draw, idvs);
panfrost_statistics_record(ctx, info, draw);
#if PAN_ARCH <= 7
struct mali_invocation_packed invocation;
if (info->instance_count > 1) {
panfrost_pack_work_groups_compute(&invocation, 1, vertex_count,
info->instance_count, 1, 1, 1, true,
false);
} else {
pan_pack(&invocation, INVOCATION, cfg) {
cfg.invocations = vertex_count - 1;
cfg.size_y_shift = 0;
cfg.size_z_shift = 0;
cfg.workgroups_x_shift = 0;
cfg.workgroups_y_shift = 0;
cfg.workgroups_z_shift = 32;
cfg.thread_group_split = MALI_SPLIT_MIN_EFFICIENT;
}
}
/* Emit all sort of descriptors. */
panfrost_emit_varying_descriptor(batch,
ctx->padded_count * ctx->instance_count,
info->mode == MESA_PRIM_POINTS);
#endif
panfrost_update_state_3d(batch);
panfrost_update_shader_state(batch, PIPE_SHADER_VERTEX);
panfrost_update_shader_state(batch, PIPE_SHADER_FRAGMENT);
@ -3715,6 +3675,47 @@ panfrost_direct_draw(struct panfrost_batch *batch,
if (panfrost_batch_skip_rasterization(batch))
return;
bool secondary_shader = vs->info.vs.secondary_enable;
#if PAN_ARCH <= 7
/* Emit all sort of descriptors. */
panfrost_emit_varying_descriptor(batch,
ctx->padded_count * ctx->instance_count,
info->mode == MESA_PRIM_POINTS);
struct mali_invocation_packed invocation;
if (info->instance_count > 1) {
panfrost_pack_work_groups_compute(&invocation, 1, vertex_count,
info->instance_count, 1, 1, 1, true,
false);
} else {
pan_pack(&invocation, INVOCATION, cfg) {
cfg.invocations = vertex_count - 1;
cfg.size_y_shift = 0;
cfg.size_z_shift = 0;
cfg.workgroups_x_shift = 0;
cfg.workgroups_y_shift = 0;
cfg.workgroups_z_shift = 32;
cfg.thread_group_split = MALI_SPLIT_MIN_EFFICIENT;
}
}
#endif
UNUSED struct panfrost_ptr tiler, vertex;
if (idvs) {
#if PAN_ARCH >= 9
tiler = pan_pool_alloc_desc(&batch->pool.base, MALLOC_VERTEX_JOB);
#elif PAN_ARCH >= 6
tiler = pan_pool_alloc_desc(&batch->pool.base, INDEXED_VERTEX_JOB);
#else
unreachable("IDVS is unsupported on Midgard");
#endif
} else {
vertex = pan_pool_alloc_desc(&batch->pool.base, COMPUTE_JOB);
tiler = pan_pool_alloc_desc(&batch->pool.base, TILER_JOB);
}
#if PAN_ARCH >= 9
assert(idvs && "Memory allocated IDVS required on Valhall");