From 68969cbcb73c5a99001d4238624b9a30f6ed8b85 Mon Sep 17 00:00:00 2001 From: Connor Abbott Date: Wed, 20 Jan 2021 14:57:12 +0100 Subject: [PATCH] brw/vec4: Don't convert tex dest type to glsl_type We were using nir_tex_instr::dest_type to a glsl_type, then passing it to emit_texture(), only to just check the number of components. Just pass the number of components directly. This lets us delete brw_glsl_base_type_for_nir_type, which was asserting with nir_texop_all_samples_equal because it didn't handle bool32. Reviewed-by: Jason Ekstrand Part-of: --- src/intel/compiler/brw_nir.c | 36 ------------------------- src/intel/compiler/brw_nir.h | 2 -- src/intel/compiler/brw_vec4.h | 2 +- src/intel/compiler/brw_vec4_nir.cpp | 14 ++-------- src/intel/compiler/brw_vec4_visitor.cpp | 4 +-- 5 files changed, 5 insertions(+), 53 deletions(-) diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index 16ae9ccc04f..e214f7ef18f 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -1482,42 +1482,6 @@ brw_type_for_nir_type(const struct gen_device_info *devinfo, nir_alu_type type) return BRW_REGISTER_TYPE_F; } -/* Returns the glsl_base_type corresponding to a nir_alu_type. - * This is used by both brw_vec4_nir and brw_fs_nir. - */ -enum glsl_base_type -brw_glsl_base_type_for_nir_type(nir_alu_type type) -{ - switch (type) { - case nir_type_float: - case nir_type_float32: - return GLSL_TYPE_FLOAT; - - case nir_type_float16: - return GLSL_TYPE_FLOAT16; - - case nir_type_float64: - return GLSL_TYPE_DOUBLE; - - case nir_type_int: - case nir_type_int32: - return GLSL_TYPE_INT; - - case nir_type_uint: - case nir_type_uint32: - return GLSL_TYPE_UINT; - - case nir_type_int16: - return GLSL_TYPE_INT16; - - case nir_type_uint16: - return GLSL_TYPE_UINT16; - - default: - unreachable("bad type"); - } -} - nir_shader * brw_nir_create_passthrough_tcs(void *mem_ctx, const struct brw_compiler *compiler, const nir_shader_compiler_options *options, diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h index 616c4244295..05b921501fc 100644 --- a/src/intel/compiler/brw_nir.h +++ b/src/intel/compiler/brw_nir.h @@ -156,8 +156,6 @@ uint32_t brw_aop_for_nir_intrinsic(const nir_intrinsic_instr *atomic); enum brw_reg_type brw_type_for_nir_type(const struct gen_device_info *devinfo, nir_alu_type type); -enum glsl_base_type brw_glsl_base_type_for_nir_type(nir_alu_type type); - void brw_nir_setup_glsl_uniforms(void *mem_ctx, nir_shader *shader, const struct gl_program *prog, struct brw_stage_prog_data *stage_prog_data, diff --git a/src/intel/compiler/brw_vec4.h b/src/intel/compiler/brw_vec4.h index be2cd412967..833a60d3ea8 100644 --- a/src/intel/compiler/brw_vec4.h +++ b/src/intel/compiler/brw_vec4.h @@ -254,7 +254,7 @@ public: void emit_texture(ir_texture_opcode op, dst_reg dest, - const glsl_type *dest_type, + int dest_components, src_reg coordinate, int coord_components, src_reg shadow_comparator, diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp index abeac65577d..546058e5a83 100644 --- a/src/intel/compiler/brw_vec4_nir.cpp +++ b/src/intel/compiler/brw_vec4_nir.cpp @@ -1950,14 +1950,6 @@ ir_texture_opcode_for_nir_texop(nir_texop texop) return op; } -static const glsl_type * -glsl_type_for_nir_alu_type(nir_alu_type alu_type, - unsigned components) -{ - return glsl_type::get_instance(brw_glsl_base_type_for_nir_type(alu_type), - components, 1); -} - void vec4_visitor::nir_emit_texture(nir_tex_instr *instr) { @@ -1973,9 +1965,6 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr) src_reg sample_index; src_reg mcs; - const glsl_type *dest_type = - glsl_type_for_nir_alu_type(instr->dest_type, - nir_tex_instr_dest_size(instr)); dst_reg dest = get_nir_dest(instr->dest, instr->dest_type); /* The hardware requires a LOD for buffer textures */ @@ -2102,7 +2091,8 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr) ir_texture_opcode op = ir_texture_opcode_for_nir_texop(instr->op); - emit_texture(op, dest, dest_type, coordinate, instr->coord_components, + emit_texture(op, dest, nir_tex_instr_dest_size(instr), + coordinate, instr->coord_components, shadow_comparator, lod, lod2, sample_index, constant_offset, offset_value, mcs, diff --git a/src/intel/compiler/brw_vec4_visitor.cpp b/src/intel/compiler/brw_vec4_visitor.cpp index 448f48aa10e..f6809295cd9 100644 --- a/src/intel/compiler/brw_vec4_visitor.cpp +++ b/src/intel/compiler/brw_vec4_visitor.cpp @@ -827,7 +827,7 @@ vec4_visitor::is_high_sampler(src_reg sampler) void vec4_visitor::emit_texture(ir_texture_opcode op, dst_reg dest, - const glsl_type *dest_type, + int dest_components, src_reg coordinate, int coord_components, src_reg shadow_comparator, @@ -964,7 +964,7 @@ vec4_visitor::emit_texture(ir_texture_opcode op, emit(MOV(dst_reg(MRF, param_base + 1, type, WRITEMASK_YW), lod2)); inst->mlen++; - if (dest_type->vector_elements == 3 || shadow_comparator.file != BAD_FILE) { + if (dest_components == 3 || shadow_comparator.file != BAD_FILE) { lod.swizzle = BRW_SWIZZLE_ZZZZ; lod2.swizzle = BRW_SWIZZLE_ZZZZ; emit(MOV(dst_reg(MRF, param_base + 2, type, WRITEMASK_X), lod));