From 688dada1a85fc77b5b102c5bf55d2fbf2e0fa478 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 30 Mar 2021 09:50:24 +0200 Subject: [PATCH] radv: do not fixup DCC after compute color resolves if DCC stores enabled With compressed DCC writes supported, the image should still be compressed after resolving using the compute path. Fixes various dEQP-VK.api.copy_and_blit.core.resolve_image.* failures with RADV_DEBUG=forcecompress on GFX10. Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/radv_meta_resolve_cs.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c index 773fe153fd7..609f6e87745 100644 --- a/src/amd/vulkan/radv_meta_resolve_cs.c +++ b/src/amd/vulkan/radv_meta_resolve_cs.c @@ -860,7 +860,8 @@ void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, radv_meta_restore(&saved_state, cmd_buffer); - if (radv_layout_dcc_compressed(cmd_buffer->device, dest_image, + if (!radv_image_use_dcc_image_stores(cmd_buffer->device, dest_image) && + radv_layout_dcc_compressed(cmd_buffer->device, dest_image, dest_image_layout, false, queue_mask)) { cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH |