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anv: try to keep the pipeline in GPGPU mode when buffer transfer ops
To avoid ping-ponging between 3D & GPGPU in the following sequence : vkCmdDispatch(...) vkCmdCopyBuffer(...) vkCmdDispatch(...) We can try to keep the pipeline in GPGPU mode when doing blorp buffer operations (we have blorp support for the CCS and can use the same shaders on RCS). Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Rohan Garg <rohan.garg@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27956>
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4 changed files with 27 additions and 3 deletions
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@ -130,6 +130,10 @@ anv_blorp_batch_init(struct anv_cmd_buffer *cmd_buffer,
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unreachable("unknown queue family");
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}
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/* Can't have both flags at the same time. */
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assert((flags & BLORP_BATCH_USE_BLITTER) == 0 ||
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(flags & BLORP_BATCH_USE_COMPUTE) == 0);
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blorp_batch_init(&cmd_buffer->device->blorp, batch, cmd_buffer, flags);
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}
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@ -1030,7 +1034,10 @@ void anv_CmdCopyBuffer2(
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ANV_FROM_HANDLE(anv_buffer, dst_buffer, pCopyBufferInfo->dstBuffer);
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struct blorp_batch batch;
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anv_blorp_batch_init(cmd_buffer, &batch, 0);
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anv_blorp_batch_init(cmd_buffer, &batch,
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cmd_buffer->state.current_pipeline ==
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cmd_buffer->device->physical->gpgpu_pipeline_value ?
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BLORP_BATCH_USE_COMPUTE : 0);
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for (unsigned r = 0; r < pCopyBufferInfo->regionCount; r++) {
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copy_buffer(cmd_buffer->device, &batch, src_buffer, dst_buffer,
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@ -1054,7 +1061,10 @@ void anv_CmdUpdateBuffer(
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ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer);
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struct blorp_batch batch;
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anv_blorp_batch_init(cmd_buffer, &batch, 0);
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anv_blorp_batch_init(cmd_buffer, &batch,
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cmd_buffer->state.current_pipeline ==
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cmd_buffer->device->physical->gpgpu_pipeline_value ?
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BLORP_BATCH_USE_COMPUTE : 0);
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/* We can't quite grab a full block because the state stream needs a
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* little data at the top to build its linked list.
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@ -1118,7 +1128,10 @@ anv_cmd_buffer_fill_area(struct anv_cmd_buffer *cmd_buffer,
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struct isl_surf isl_surf;
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struct blorp_batch batch;
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anv_blorp_batch_init(cmd_buffer, &batch, 0);
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anv_blorp_batch_init(cmd_buffer, &batch,
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cmd_buffer->state.current_pipeline ==
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cmd_buffer->device->physical->gpgpu_pipeline_value ?
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BLORP_BATCH_USE_COMPUTE : 0);
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/* First, we compute the biggest format that can be used with the
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* given offsets and size.
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@ -1201,6 +1201,9 @@ struct anv_physical_device {
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void (*cmd_emit_timestamp)(struct anv_batch *, struct anv_device *, struct anv_address,
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enum anv_timestamp_capture_type, void *);
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struct intel_measure_device measure_device;
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/* Value of PIPELINE_SELECT::PipelineSelection == GPGPU */
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uint32_t gpgpu_pipeline_value;
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};
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static inline uint32_t
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@ -3390,6 +3390,12 @@ anv_pipe_flush_bits_for_access_flags(struct anv_cmd_buffer *cmd_buffer,
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pipe_bits |= ANV_PIPE_HDC_PIPELINE_FLUSH_BIT;
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pipe_bits |= ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT;
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} else {
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/* We can use the data port when trying to stay in compute mode on
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* the RCS.
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*/
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pipe_bits |= ANV_PIPE_HDC_PIPELINE_FLUSH_BIT;
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pipe_bits |= ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT;
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/* Most operations are done through RT/detph writes */
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pipe_bits |= ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT;
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pipe_bits |= ANV_PIPE_DEPTH_CACHE_FLUSH_BIT;
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}
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@ -770,6 +770,8 @@ genX(init_physical_device_state)(ASSERTED struct anv_physical_device *pdevice)
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#endif
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pdevice->cmd_emit_timestamp = genX(cmd_emit_timestamp);
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pdevice->gpgpu_pipeline_value = GPGPU;
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}
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VkResult
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