diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 753f9d0d3fb..bee39a40f7d 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -1790,11 +1790,11 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
    if (OPT(nir_lower_tex, &tex_options))
       OPT(nir_lower_tex, &tex_options);
 
-   const struct intel_nir_lower_texture_opts intel_tex_options = {
+   const struct brw_nir_lower_texture_opts brw_tex_options = {
       .combined_lod_and_array_index = compiler->devinfo->ver >= 20,
       .combined_lod_or_bias_and_offset = compiler->devinfo->ver >= 20,
    };
-   OPT(intel_nir_lower_texture, &intel_tex_options);
+   OPT(brw_nir_lower_texture, &brw_tex_options);
 
    OPT(intel_nir_lower_sparse_intrinsics);
 
diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h
index e32d1dff0ff..54f0a655b74 100644
--- a/src/intel/compiler/brw_nir.h
+++ b/src/intel/compiler/brw_nir.h
@@ -205,6 +205,13 @@ bool brw_nir_lower_texel_address(nir_shader *shader,
                                  const struct intel_device_info *devinfo,
                                  enum isl_tiling tiling);
 
+struct brw_nir_lower_texture_opts {
+   bool combined_lod_and_array_index;
+   bool combined_lod_or_bias_and_offset;
+};
+bool brw_nir_lower_texture(nir_shader *nir,
+                           const struct brw_nir_lower_texture_opts *opts);
+
 bool brw_nir_lower_sample_index_in_coord(nir_shader *nir);
 
 bool brw_nir_lower_mem_access_bit_sizes(nir_shader *shader,
diff --git a/src/intel/compiler/intel_nir_lower_texture.c b/src/intel/compiler/brw_nir_lower_texture.c
similarity index 95%
rename from src/intel/compiler/intel_nir_lower_texture.c
rename to src/intel/compiler/brw_nir_lower_texture.c
index 08e0c5820dc..aa478175bcc 100644
--- a/src/intel/compiler/intel_nir_lower_texture.c
+++ b/src/intel/compiler/brw_nir_lower_texture.c
@@ -22,7 +22,7 @@
  */
 
 #include "compiler/nir/nir_builder.h"
-#include "intel_nir.h"
+#include "brw_nir.h"
 
 /**
  * Pack either the explicit LOD or LOD bias and the array index together.
@@ -163,12 +163,12 @@ pack_lod_or_bias_and_offset(nir_builder *b, nir_tex_instr *tex)
 }
 
 static bool
-intel_nir_lower_texture_instr(nir_builder *b, nir_instr *instr, void *cb_data)
+brw_nir_lower_texture_instr(nir_builder *b, nir_instr *instr, void *cb_data)
 {
    if (instr->type != nir_instr_type_tex)
       return false;
 
-   const struct intel_nir_lower_texture_opts *opts = cb_data;
+   const struct brw_nir_lower_texture_opts *opts = cb_data;
    nir_tex_instr *tex = nir_instr_as_tex(instr);
 
    switch (tex->op) {
@@ -195,11 +195,11 @@ intel_nir_lower_texture_instr(nir_builder *b, nir_instr *instr, void *cb_data)
 }
 
 bool
-intel_nir_lower_texture(nir_shader *shader,
-                        const struct intel_nir_lower_texture_opts *opts)
+brw_nir_lower_texture(nir_shader *shader,
+                      const struct brw_nir_lower_texture_opts *opts)
 {
    return nir_shader_instructions_pass(shader,
-                                       intel_nir_lower_texture_instr,
+                                       brw_nir_lower_texture_instr,
                                        nir_metadata_none,
                                        (void *)opts);
 }
diff --git a/src/intel/compiler/intel_nir.h b/src/intel/compiler/intel_nir.h
index 54a123a73f4..9effad52f02 100644
--- a/src/intel/compiler/intel_nir.h
+++ b/src/intel/compiler/intel_nir.h
@@ -28,13 +28,6 @@ bool intel_nir_lower_patch_vertices_in(nir_shader *shader, unsigned input_vertic
 bool intel_nir_lower_shading_rate_output(nir_shader *nir);
 bool intel_nir_lower_sparse_intrinsics(nir_shader *nir);
 
-struct intel_nir_lower_texture_opts {
-   bool combined_lod_and_array_index;
-   bool combined_lod_or_bias_and_offset;
-};
-bool intel_nir_lower_texture(nir_shader *nir,
-                             const struct intel_nir_lower_texture_opts *opts);
-
 bool intel_nir_opt_peephole_ffma(nir_shader *shader);
 bool intel_nir_opt_peephole_imul32x16(nir_shader *shader);
 
diff --git a/src/intel/compiler/meson.build b/src/intel/compiler/meson.build
index cd5c43e247f..d2d803a2232 100644
--- a/src/intel/compiler/meson.build
+++ b/src/intel/compiler/meson.build
@@ -14,7 +14,6 @@ intel_nir_files = files(
   'intel_nir_lower_printf.c',
   'intel_nir_lower_shading_rate_output.c',
   'intel_nir_lower_sparse.c',
-  'intel_nir_lower_texture.c',
   'intel_nir_opt_peephole_ffma.c',
   'intel_nir_opt_peephole_imul32x16.c',
   'intel_nir_tcs_workarounds.c',
@@ -79,6 +78,7 @@ libintel_compiler_brw_files = files(
   'brw_nir_lower_shader_calls.c',
   'brw_nir_lower_storage_image.c',
   'brw_nir_lower_texel_address.c',
+  'brw_nir_lower_texture.c',
   'brw_nir_opt_fsat.c',
   'brw_nir_rt.h',
   'brw_nir_rt.c',