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asahi: carveout lower VAs
for cheaper bounds checks. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
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1 changed files with 19 additions and 1 deletions
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@ -494,12 +494,30 @@ agx_open_device(void *memctx, struct agx_device *dev)
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dev->params.gpu_generation, dev->params.gpu_variant,
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dev->params.gpu_revision + 0xA0);
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/* We need a large chunk of VA space carved out for robustness. Hardware
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* loads can shift an i32 by up to 2, for a total shift of 4. If the base
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* address is zero, 36-bits is therefore enough to trap any zero-extended
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* 32-bit index. For more generality we would need a larger carveout, but
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* this is already optimal for VBOs.
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*
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* TODO: Maybe this should be on top instead? Might be ok.
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*/
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uint64_t reservation = (1ull << 36);
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dev->guard_size = dev->params.vm_page_size;
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if (dev->params.vm_usc_start) {
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dev->shader_base = dev->params.vm_usc_start;
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} else {
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// Put the USC heap at the bottom of the user address space, 4GiB aligned
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dev->shader_base = ALIGN_POT(dev->params.vm_user_start, 0x100000000ull);
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dev->shader_base = ALIGN_POT(MAX2(dev->params.vm_user_start, reservation),
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0x100000000ull);
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}
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if (dev->shader_base < reservation) {
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/* Our robustness implementation requires the bottom unmapped */
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fprintf(stderr, "Unexpected address layout, can't cope\n");
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assert(0);
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return false;
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}
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uint64_t shader_size = 0x100000000ull;
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