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pan/bi: Stop writing pan_shader_info:🆚:idvs on non VS stages

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We were unconditionally writing to vs anonymous union on other stages
than VS. this was not causing issues as pan_shader_compile
unconditionally overrite the value for fragment shaders and compute
shaders union is too small to be affecte.

Fixes: 1d21de788d ("pan/bi: Specialize shaders for IDVS")
Reported-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34758>
(cherry picked from commit 4100f1d08a)
This commit is contained in:
Mary Guillemard 2025-04-30 12:40:14 +00:00 • committed by Eric Engestrom
parent fe597d9e53
commit 674726caa1
2 changed files with 14 additions and 10 deletions
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2
.pick_status.json
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@ -584,7 +584,7 @@
"description": "pan/bi: Stop writing pan_shader_info::vs::idvs on non VS stages",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "1d21de788d3f4f7fbdcf5b57884bc149a2e219e3",
"notes": null

22
src/panfrost/compiler/bifrost_compile.c
View file

@ -6296,10 +6296,12 @@ bifrost_compile_shader_nir(nir_shader *nir,
*/
NIR_PASS(_, nir, pan_nir_lower_zs_store);
info->vs.idvs = bi_should_idvs(nir, inputs);
if (nir->info.stage == MESA_SHADER_VERTEX) {
info->vs.idvs = bi_should_idvs(nir, inputs);
if (info->vs.idvs)
NIR_PASS(_, nir, bifrost_nir_lower_shader_output);
if (info->vs.idvs)
NIR_PASS(_, nir, bifrost_nir_lower_shader_output);
}
bi_optimize_nir(nir, inputs->gpu_id, inputs->is_blend);
@ -6307,12 +6309,14 @@ bifrost_compile_shader_nir(nir_shader *nir,
pan_nir_collect_varyings(nir, info, PAN_MEDIUMP_VARY_32BIT);
/* On Avalon, IDVS is only in one binary */
if (info->vs.idvs && pan_arch(inputs->gpu_id) >= 12) {
bi_compile_variant(nir, inputs, binary, info, BI_IDVS_ALL);
} else if (info->vs.idvs) {
bi_compile_variant(nir, inputs, binary, info, BI_IDVS_POSITION);
bi_compile_variant(nir, inputs, binary, info, BI_IDVS_VARYING);
if (nir->info.stage == MESA_SHADER_VERTEX && info->vs.idvs) {
/* On Avalon, IDVS is only in one binary */
if (pan_arch(inputs->gpu_id) >= 12)
bi_compile_variant(nir, inputs, binary, info, BI_IDVS_ALL);
else {
bi_compile_variant(nir, inputs, binary, info, BI_IDVS_POSITION);
bi_compile_variant(nir, inputs, binary, info, BI_IDVS_VARYING);
}
} else {
bi_compile_variant(nir, inputs, binary, info, BI_IDVS_NONE);
}