diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c
index 53f17e64d79..9fdbc601f30 100644
--- a/src/amd/vulkan/radv_pipeline_graphics.c
+++ b/src/amd/vulkan/radv_pipeline_graphics.c
@@ -3775,29 +3775,39 @@ radv_pipeline_init_shader_stages_state(const struct radv_device *device, struct
    }
 }
 
-static uint32_t
-radv_pipeline_init_vgt_gs_out(struct radv_graphics_pipeline *pipeline, const struct vk_graphics_pipeline_state *state)
+uint32_t
+radv_get_vgt_gs_out(struct radv_shader **shaders, uint32_t primitive_topology)
 {
    uint32_t gs_out;
 
-   if (radv_pipeline_has_stage(pipeline, MESA_SHADER_GEOMETRY)) {
-      gs_out = radv_conv_gl_prim_to_gs_out(pipeline->base.shaders[MESA_SHADER_GEOMETRY]->info.gs.output_prim);
-   } else if (radv_pipeline_has_stage(pipeline, MESA_SHADER_TESS_CTRL)) {
-      if (pipeline->base.shaders[MESA_SHADER_TESS_EVAL]->info.tes.point_mode) {
+   if (shaders[MESA_SHADER_GEOMETRY]) {
+      gs_out = radv_conv_gl_prim_to_gs_out(shaders[MESA_SHADER_GEOMETRY]->info.gs.output_prim);
+   } else if (shaders[MESA_SHADER_TESS_CTRL]) {
+      if (shaders[MESA_SHADER_TESS_EVAL]->info.tes.point_mode) {
          gs_out = V_028A6C_POINTLIST;
       } else {
-         gs_out =
-            radv_conv_tess_prim_to_gs_out(pipeline->base.shaders[MESA_SHADER_TESS_EVAL]->info.tes._primitive_mode);
+         gs_out = radv_conv_tess_prim_to_gs_out(shaders[MESA_SHADER_TESS_EVAL]->info.tes._primitive_mode);
       }
-   } else if (radv_pipeline_has_stage(pipeline, MESA_SHADER_MESH)) {
-      gs_out = radv_conv_gl_prim_to_gs_out(pipeline->base.shaders[MESA_SHADER_MESH]->info.ms.output_prim);
+   } else if (shaders[MESA_SHADER_MESH]) {
+      gs_out = radv_conv_gl_prim_to_gs_out(shaders[MESA_SHADER_MESH]->info.ms.output_prim);
    } else {
-      gs_out = radv_conv_prim_to_gs_out(radv_translate_prim(state->ia->primitive_topology), false);
+      gs_out = radv_conv_prim_to_gs_out(primitive_topology, false);
    }
 
    return gs_out;
 }
 
+static uint32_t
+radv_pipeline_init_vgt_gs_out(struct radv_graphics_pipeline *pipeline, const struct vk_graphics_pipeline_state *state)
+{
+   uint32_t primitive_topology = 0;
+
+   if (pipeline->last_vgt_api_stage == MESA_SHADER_VERTEX)
+      primitive_topology = radv_translate_prim(state->ia->primitive_topology);
+
+   return radv_get_vgt_gs_out(pipeline->base.shaders, primitive_topology);
+}
+
 static void
 radv_pipeline_init_extra(struct radv_graphics_pipeline *pipeline,
                          const struct radv_graphics_pipeline_create_info *extra, struct radv_blend_state *blend_state,
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 48eaa68f6bb..4fe0518c601 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -3219,6 +3219,8 @@ radv_get_num_vertices_per_prim(const struct radv_graphics_state_key *gfx_state)
    }
 }
 
+uint32_t radv_get_vgt_gs_out(struct radv_shader **shaders, uint32_t primitive_topology);
+
 static inline uint32_t
 radv_translate_fill(VkPolygonMode func)
 {