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radv: add DI_PT_RECTLIST to si_conv_prim_to_gs_out()

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22105>
This commit is contained in:
Samuel Pitoiset 2023-03-27 12:28:11 +02:00 • committed by Marge Bot
parent 5e9ea15484
commit 66fec16238
3 changed files with 12 additions and 10 deletions
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9
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -2157,7 +2157,7 @@ radv_emit_provoking_vertex_mode(struct radv_cmd_buffer *cmd_buffer)
if (d->vk.rs.provoking_vertex == VK_PROVOKING_VERTEX_MODE_LAST_VERTEX_EXT) {
if (stage == MESA_SHADER_VERTEX) {
provoking_vtx = si_conv_prim_to_gs_out(d->vk.ia.primitive_topology);
provoking_vtx = si_conv_prim_to_gs_out(d->vk.ia.primitive_topology, pipeline->is_ngg);
} else {
assert(stage == MESA_SHADER_GEOMETRY);
struct radv_shader *gs = pipeline->base.shaders[stage];
@ -2194,7 +2194,7 @@ radv_emit_primitive_topology(struct radv_cmd_buffer *cmd_buffer)
base_reg = pipeline->base.user_data_0[stage];
radeon_set_sh_reg(cmd_buffer->cs, base_reg + loc->sgpr_idx * 4,
si_conv_prim_to_gs_out(d->vk.ia.primitive_topology) + 1);
si_conv_prim_to_gs_out(d->vk.ia.primitive_topology, pipeline->is_ngg) + 1);
}
static void
@ -3505,7 +3505,7 @@ radv_emit_guardband_state(struct radv_cmd_buffer *cmd_buffer)
/* Ignore dynamic primitive topology for TES/GS/MS stages. */
rast_prim = pipeline->rast_prim;
} else {
rast_prim = si_conv_prim_to_gs_out(d->vk.ia.primitive_topology);
rast_prim = si_conv_prim_to_gs_out(d->vk.ia.primitive_topology, pipeline->is_ngg);
}
si_write_guardband(cmd_buffer->cs, d->vk.vp.viewport_count, d->vk.vp.viewports, rast_prim,
@ -8622,7 +8622,8 @@ radv_get_ngg_culling_settings(struct radv_cmd_buffer *cmd_buffer, bool vp_y_inve
* because we don't know the primitive topology at compile time, so we should
* disable it dynamically for points or lines.
*/
const unsigned num_vertices_per_prim = si_conv_prim_to_gs_out(d->vk.ia.primitive_topology) + 1;
const unsigned num_vertices_per_prim =
si_conv_prim_to_gs_out(d->vk.ia.primitive_topology, true) + 1;
if (num_vertices_per_prim != 3)
return radv_nggc_none;

7
src/amd/vulkan/radv_pipeline.c
View file

@ -4772,7 +4772,7 @@ radv_pipeline_init_vgt_gs_out(struct radv_graphics_pipeline *pipeline,
gs_out =
si_conv_gl_prim_to_gs_out(pipeline->base.shaders[MESA_SHADER_MESH]->info.ms.output_prim);
} else {
gs_out = si_conv_prim_to_gs_out(si_translate_prim(state->ia->primitive_topology));
gs_out = si_conv_prim_to_gs_out(si_translate_prim(state->ia->primitive_topology), false);
}
return gs_out;
@ -4802,9 +4802,8 @@ radv_pipeline_init_extra(struct radv_graphics_pipeline *pipeline,
struct radv_dynamic_state *dynamic = &pipeline->dynamic_state;
dynamic->vk.ia.primitive_topology = V_008958_DI_PT_RECTLIST;
*vgt_gs_out_prim_type = V_028A6C_TRISTRIP;
if (radv_pipeline_has_ngg(pipeline))
*vgt_gs_out_prim_type = V_028A6C_RECTLIST;
*vgt_gs_out_prim_type =
si_conv_prim_to_gs_out(dynamic->vk.ia.primitive_topology, radv_pipeline_has_ngg(pipeline));
pipeline->rast_prim = *vgt_gs_out_prim_type;
}

6
src/amd/vulkan/radv_private.h
View file

@ -3202,7 +3202,7 @@ void radv_prepare_dgc(struct radv_cmd_buffer *cmd_buffer,
const VkGeneratedCommandsInfoNV *pGeneratedCommandsInfo);
static inline uint32_t
si_conv_prim_to_gs_out(uint32_t topology)
si_conv_prim_to_gs_out(uint32_t topology, bool is_ngg)
{
switch (topology) {
case V_008958_DI_PT_POINTLIST:
@ -3219,6 +3219,8 @@ si_conv_prim_to_gs_out(uint32_t topology)
case V_008958_DI_PT_TRILIST_ADJ:
case V_008958_DI_PT_TRISTRIP_ADJ:
return V_028A6C_TRISTRIP;
case V_008958_DI_PT_RECTLIST:
return is_ngg ? V_028A6C_RECTLIST : V_028A6C_TRISTRIP;
default:
assert(0);
return 0;
@ -3319,7 +3321,7 @@ radv_get_num_vertices_per_prim(const struct radv_pipeline_key *pipeline_key)
return 3;
} else {
/* Need to add 1, because: V_028A6C_POINTLIST=0, V_028A6C_LINESTRIP=1, V_028A6C_TRISTRIP=2, etc. */
return si_conv_prim_to_gs_out(pipeline_key->vs.topology) + 1;
return si_conv_prim_to_gs_out(pipeline_key->vs.topology, false) + 1;
}
}