fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-25 04:20:08 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

vc4: Add support for point size setting.

Browse source 
This is the support for both the global and per-vertex modes.
This commit is contained in:
Eric Anholt 2014-09-24 14:23:25 -07:00
parent f24588d64e
commit 66b7bd60e0
6 changed files with 47 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/gallium/drivers/vc4/vc4_draw.c
View file

@ -153,7 +153,11 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
1);
cl_start_shader_reloc(&vc4->shader_rec, 3 + vtx->num_elements);
cl_u16(&vc4->shader_rec, VC4_SHADER_FLAG_ENABLE_CLIPPING);
cl_u16(&vc4->shader_rec,
VC4_SHADER_FLAG_ENABLE_CLIPPING |
((info->mode == PIPE_PRIM_POINTS &&
vc4->rasterizer->base.point_size_per_vertex) ?
VC4_SHADER_FLAG_VS_POINT_SIZE : 0));
cl_u8(&vc4->shader_rec, 0); /* fs num uniforms (unused) */
cl_u8(&vc4->shader_rec, vc4->prog.fs->num_inputs);
cl_reloc(vc4, &vc4->shader_rec, vc4->prog.fs->bo, 0);

3
src/gallium/drivers/vc4/vc4_emit.c
View file

@ -54,6 +54,9 @@ vc4_emit_state(struct pipe_context *pctx)
cl_u16(&vc4->bcl, vc4->rasterizer->offset_factor);
cl_u16(&vc4->bcl, vc4->rasterizer->offset_units);
cl_u8(&vc4->bcl, VC4_PACKET_POINT_SIZE);
cl_f(&vc4->bcl, vc4->rasterizer->point_size);
cl_u8(&vc4->bcl, VC4_PACKET_LINE_WIDTH);
cl_f(&vc4->bcl, vc4->rasterizer->base.line_width);
}

34
src/gallium/drivers/vc4/vc4_program.c
View file

@ -67,6 +67,7 @@ struct vc4_fs_key {
struct vc4_vs_key {
struct vc4_key base;
enum pipe_format attr_formats[8];
bool per_vertex_point_size;
};
static void
@ -934,6 +935,9 @@ emit_tgsi_declaration(struct vc4_compile *c,
case TGSI_SEMANTIC_COLOR:
c->output_color_index = decl->Range.First * 4;
break;
case TGSI_SEMANTIC_PSIZE:
c->output_point_size_index = decl->Range.First * 4;
break;
}
break;
@ -1431,6 +1435,24 @@ emit_rcp_wc_write(struct vc4_compile *c, struct qreg rcp_w)
qir_VPM_WRITE(c, rcp_w);
}
static void
emit_point_size_write(struct vc4_compile *c)
{
struct qreg point_size;
if (c->output_point_size_index)
point_size = c->outputs[c->output_point_size_index + 3];
else
point_size = qir_uniform_f(c, 1.0);
/* Workaround: HW-2726 PTB does not handle zero-size points (BCM2835,
* BCM21553).
*/
point_size = qir_FMAX(c, point_size, qir_uniform_f(c, .125));
qir_VPM_WRITE(c, point_size);
}
static void
emit_vert_end(struct vc4_compile *c)
{
@ -1439,6 +1461,8 @@ emit_vert_end(struct vc4_compile *c)
emit_scaled_viewport_write(c, rcp_w);
emit_zs_write(c, rcp_w);
emit_rcp_wc_write(c, rcp_w);
if (c->vs_key->per_vertex_point_size)
emit_point_size_write(c);
for (int i = 4; i < c->num_outputs; i++) {
qir_VPM_WRITE(c, c->outputs[i]);
@ -1456,6 +1480,8 @@ emit_coord_end(struct vc4_compile *c)
emit_scaled_viewport_write(c, rcp_w);
emit_zs_write(c, rcp_w);
emit_rcp_wc_write(c, rcp_w);
if (c->vs_key->per_vertex_point_size)
emit_point_size_write(c);
}
static struct vc4_compile *
@ -1700,7 +1726,7 @@ vc4_update_compiled_fs(struct vc4_context *vc4, uint8_t prim_mode)
}
static void
vc4_update_compiled_vs(struct vc4_context *vc4)
vc4_update_compiled_vs(struct vc4_context *vc4, uint8_t prim_mode)
{
struct vc4_vs_key local_key;
struct vc4_vs_key *key = &local_key;
@ -1712,6 +1738,10 @@ vc4_update_compiled_vs(struct vc4_context *vc4)
for (int i = 0; i < ARRAY_SIZE(key->attr_formats); i++)
key->attr_formats[i] = vc4->vtx->pipe[i].src_format;
key->per_vertex_point_size =
(prim_mode == PIPE_PRIM_POINTS &&
vc4->rasterizer->base.point_size_per_vertex);
vc4->prog.vs = util_hash_table_get(vc4->vs_cache, key);
if (vc4->prog.vs)
return;
@ -1730,7 +1760,7 @@ void
vc4_update_compiled_shaders(struct vc4_context *vc4, uint8_t prim_mode)
{
vc4_update_compiled_fs(vc4, prim_mode);
vc4_update_compiled_vs(vc4);
vc4_update_compiled_vs(vc4, prim_mode);
}
static unsigned

1
src/gallium/drivers/vc4/vc4_qir.h
View file

@ -238,6 +238,7 @@ struct vc4_compile {
uint32_t num_texture_samples;
uint32_t output_position_index;
uint32_t output_color_index;
uint32_t output_point_size_index;
struct qreg undef;
enum qstage stage;

3
src/gallium/drivers/vc4/vc4_screen.c
View file

@ -243,7 +243,8 @@ vc4_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
case PIPE_CAPF_MAX_POINT_WIDTH:
case PIPE_CAPF_MAX_POINT_WIDTH_AA:
return 8192.0f;
return 512.0f;
case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
return 0.0f;
case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:

6
src/gallium/drivers/vc4/vc4_state.c
View file

@ -102,8 +102,10 @@ vc4_create_rasterizer_state(struct pipe_context *pctx,
if (!(cso->cull_face & PIPE_FACE_BACK))
so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_PRIM_BACK;
/* XXX: per_vertex */
so->point_size = cso->point_size;
/* Workaround: HW-2726 PTB does not handle zero-size points (BCM2835,
* BCM21553).
*/
so->point_size = MAX2(cso->point_size, .125);
if (cso->front_ccw)
so->config_bits[0] |= VC4_CONFIG_BITS_CW_PRIMITIVES;