fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-23 04:40:09 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

radeonsi/gfx12: disable display dcc for front buffer rendering

Browse source 
Same logic as other chips, except we need to reallocate the texture
as we can't disable dcc.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32281>
This commit is contained in:
Pierre-Eric Pelloux-Prayer 2024-11-21 11:46:02 +01:00 • committed by Marge Bot
parent df7bb6bfd2
commit 666a6eb871
1 changed files with 24 additions and 9 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

33
src/gallium/drivers/radeonsi/si_texture.c
View file

@ -798,16 +798,31 @@ static bool si_texture_get_handle(struct pipe_screen *screen, struct pipe_contex
assert(tex->surface.tile_swizzle == 0); assert(tex->surface.tile_swizzle == 0);
} }
/* Since shader image stores don't support DCC on GFX8, const bool debug_disable_dcc = sscreen->debug_flags & DBG(NO_EXPORTED_DCC);
* disable it for external clients that want write /* Since shader image stores don't support DCC on GFX9 and older,
* access. * disable it for external clients that want write access.
*/ */
if (sscreen->debug_flags & DBG(NO_EXPORTED_DCC) || const bool shader_write = sscreen->info.gfx_level <= GFX9 &&
(usage & PIPE_HANDLE_USAGE_SHADER_WRITE && !tex->is_depth && tex->surface.meta_offset) || usage & PIPE_HANDLE_USAGE_SHADER_WRITE &&
/* Displayable DCC requires an explicit flush. */ !tex->is_depth &&
(!(usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH) && tex->surface.meta_offset;
si_displayable_dcc_needs_explicit_flush(tex))) { /* Another reason to disable display dcc is front buffer rendering.
if (si_texture_disable_dcc(sctx, tex)) { * This can happens with Xorg. If the ddx driver uses GBM_BO_USE_FRONT_RENDERING,
* there's nothing to do because the texture is not using DCC.
* If the flag isn't set, we have to infer it to get correct rendering.
*/
const bool front_buffer_rendering = !(usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH) &&
tex->buffer.b.b.bind & PIPE_BIND_SCANOUT;
/* If display dcc requires a retiling step, drop dcc. */
const bool explicit_flush = !(usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH) &&
si_displayable_dcc_needs_explicit_flush(tex);
if (debug_disable_dcc || shader_write || front_buffer_rendering || explicit_flush) {
if (sscreen->info.gfx_level >= GFX12) {
si_reallocate_texture_inplace(sctx, tex, PIPE_BIND_CONST_BW, false);
update_metadata = true;
} else if (si_texture_disable_dcc(sctx, tex)) {
update_metadata = true; update_metadata = true;
/* si_texture_disable_dcc flushes the context */ /* si_texture_disable_dcc flushes the context */
flush = false; flush = false;