mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-08 02:38:04 +02:00
Merge branch 'gallium-dynamicstencilref'
This commit is contained in:
commit
6602889d82
66 changed files with 579 additions and 194 deletions
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@ -93,6 +93,7 @@ struct cso_context {
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struct pipe_framebuffer_state fb, fb_saved;
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struct pipe_viewport_state vp, vp_saved;
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struct pipe_blend_color blend_color;
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struct pipe_stencil_ref stencil_ref, stencil_ref_saved;
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};
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@ -1057,8 +1058,6 @@ void cso_restore_viewport(struct cso_context *ctx)
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}
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enum pipe_error cso_set_blend_color(struct cso_context *ctx,
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const struct pipe_blend_color *bc)
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{
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@ -1069,6 +1068,30 @@ enum pipe_error cso_set_blend_color(struct cso_context *ctx,
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return PIPE_OK;
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}
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enum pipe_error cso_set_stencil_ref(struct cso_context *ctx,
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const struct pipe_stencil_ref *sr)
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{
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if (memcmp(&ctx->stencil_ref, sr, sizeof(ctx->stencil_ref))) {
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ctx->stencil_ref = *sr;
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ctx->pipe->set_stencil_ref(ctx->pipe, sr);
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}
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return PIPE_OK;
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}
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void cso_save_stencil_ref(struct cso_context *ctx)
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{
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ctx->stencil_ref_saved = ctx->stencil_ref;
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}
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void cso_restore_stencil_ref(struct cso_context *ctx)
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{
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if (memcmp(&ctx->stencil_ref, &ctx->stencil_ref_saved, sizeof(ctx->stencil_ref))) {
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ctx->stencil_ref = ctx->stencil_ref_saved;
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ctx->pipe->set_stencil_ref(ctx->pipe, &ctx->stencil_ref);
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}
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}
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enum pipe_error cso_set_geometry_shader_handle(struct cso_context *ctx,
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void *handle)
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{
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@ -174,6 +174,12 @@ enum pipe_error cso_set_blend_color(struct cso_context *cso,
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const struct pipe_blend_color *bc);
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enum pipe_error cso_set_stencil_ref(struct cso_context *cso,
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const struct pipe_stencil_ref *sr);
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void cso_save_stencil_ref(struct cso_context *cso);
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void cso_restore_stencil_ref(struct cso_context *cso);
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#ifdef __cplusplus
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}
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#endif
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@ -60,13 +60,12 @@ struct blitter_context_priv
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float vertices[4][2][4]; /**< {pos, color} or {pos, texcoord} */
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/* Templates for various state objects. */
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struct pipe_depth_stencil_alpha_state template_dsa;
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struct pipe_sampler_state template_sampler_state;
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/* Constant state objects. */
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/* Vertex shaders. */
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void *vs_col; /**< Vertex shader which passes {pos, color} to the output */
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void *vs_tex; /**<Vertex shader which passes {pos, texcoord} to the output.*/
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void *vs_tex; /**< Vertex shader which passes {pos, texcoord} to the output.*/
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/* Fragment shaders. */
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/* FS which outputs a color to multiple color buffers. */
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@ -85,7 +84,7 @@ struct blitter_context_priv
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void *blend_keep_color; /**< blend state with writemask of 0 */
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/* Depth stencil alpha state. */
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void *dsa_write_depth_stencil[0xff]; /**< indices are stencil clear values */
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void *dsa_write_depth_stencil;
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void *dsa_write_depth_keep_stencil;
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void *dsa_keep_depth_stencil;
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@ -100,7 +99,7 @@ struct blitter_context *util_blitter_create(struct pipe_context *pipe)
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{
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struct blitter_context_priv *ctx;
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struct pipe_blend_state blend;
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struct pipe_depth_stencil_alpha_state *dsa;
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struct pipe_depth_stencil_alpha_state dsa;
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struct pipe_rasterizer_state rs_state;
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struct pipe_sampler_state *sampler_state;
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unsigned i;
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@ -129,23 +128,24 @@ struct blitter_context *util_blitter_create(struct pipe_context *pipe)
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ctx->blend_write_color = pipe->create_blend_state(pipe, &blend);
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/* depth stencil alpha state objects */
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dsa = &ctx->template_dsa;
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ctx->dsa_keep_depth_stencil =
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pipe->create_depth_stencil_alpha_state(pipe, dsa);
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pipe->create_depth_stencil_alpha_state(pipe, &dsa);
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dsa->depth.enabled = 1;
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dsa->depth.writemask = 1;
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dsa->depth.func = PIPE_FUNC_ALWAYS;
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dsa.depth.enabled = 1;
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dsa.depth.writemask = 1;
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dsa.depth.func = PIPE_FUNC_ALWAYS;
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ctx->dsa_write_depth_keep_stencil =
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pipe->create_depth_stencil_alpha_state(pipe, dsa);
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pipe->create_depth_stencil_alpha_state(pipe, &dsa);
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dsa->stencil[0].enabled = 1;
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dsa->stencil[0].func = PIPE_FUNC_ALWAYS;
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dsa->stencil[0].fail_op = PIPE_STENCIL_OP_REPLACE;
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dsa->stencil[0].zpass_op = PIPE_STENCIL_OP_REPLACE;
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dsa->stencil[0].zfail_op = PIPE_STENCIL_OP_REPLACE;
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dsa->stencil[0].valuemask = 0xff;
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dsa->stencil[0].writemask = 0xff;
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dsa.stencil[0].enabled = 1;
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dsa.stencil[0].func = PIPE_FUNC_ALWAYS;
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dsa.stencil[0].fail_op = PIPE_STENCIL_OP_REPLACE;
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dsa.stencil[0].zpass_op = PIPE_STENCIL_OP_REPLACE;
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dsa.stencil[0].zfail_op = PIPE_STENCIL_OP_REPLACE;
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dsa.stencil[0].valuemask = 0xff;
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dsa.stencil[0].writemask = 0xff;
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ctx->dsa_write_depth_stencil =
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pipe->create_depth_stencil_alpha_state(pipe, &dsa);
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/* The DSA state objects which write depth and stencil are created
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* on-demand. */
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@ -210,12 +210,8 @@ void util_blitter_destroy(struct blitter_context *blitter)
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pipe->delete_depth_stencil_alpha_state(pipe, ctx->dsa_keep_depth_stencil);
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pipe->delete_depth_stencil_alpha_state(pipe,
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ctx->dsa_write_depth_keep_stencil);
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for (i = 0; i < 0xff; i++)
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if (ctx->dsa_write_depth_stencil[i])
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pipe->delete_depth_stencil_alpha_state(pipe,
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ctx->dsa_write_depth_stencil[i]);
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pipe->delete_depth_stencil_alpha_state(pipe, ctx->dsa_write_depth_stencil);
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pipe->delete_rasterizer_state(pipe, ctx->rs_state);
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pipe->delete_vs_state(pipe, ctx->vs_col);
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pipe->delete_vs_state(pipe, ctx->vs_tex);
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@ -266,6 +262,8 @@ static void blitter_restore_CSOs(struct blitter_context_priv *ctx)
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ctx->blitter.saved_fs = INVALID_PTR;
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ctx->blitter.saved_vs = INVALID_PTR;
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pipe->set_stencil_ref(pipe, &ctx->blitter.saved_stencil_ref);
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/* restore the state objects which are required to be saved before copy/fill
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*/
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if (ctx->blitter.saved_fb_state.nr_cbufs != ~0) {
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@ -412,26 +410,6 @@ static void blitter_draw_quad(struct blitter_context_priv *ctx)
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2); /* attribs/vert */
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}
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static INLINE
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void *blitter_get_state_write_depth_stencil(
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struct blitter_context_priv *ctx,
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unsigned stencil)
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{
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struct pipe_context *pipe = ctx->pipe;
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stencil &= 0xff;
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/* Create the DSA state on-demand. */
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if (!ctx->dsa_write_depth_stencil[stencil]) {
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ctx->template_dsa.stencil[0].ref_value = stencil;
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ctx->dsa_write_depth_stencil[stencil] =
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pipe->create_depth_stencil_alpha_state(pipe, &ctx->template_dsa);
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}
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return ctx->dsa_write_depth_stencil[stencil];
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}
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static INLINE
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void **blitter_get_sampler_state(struct blitter_context_priv *ctx,
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int miplevel)
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@ -559,9 +537,13 @@ void util_blitter_clear(struct blitter_context *blitter,
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else
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pipe->bind_blend_state(pipe, ctx->blend_keep_color);
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if (clear_buffers & PIPE_CLEAR_DEPTHSTENCIL)
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pipe->bind_depth_stencil_alpha_state(pipe,
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blitter_get_state_write_depth_stencil(ctx, stencil));
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if (clear_buffers & PIPE_CLEAR_DEPTHSTENCIL) {
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struct pipe_stencil_ref sr;
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memset (&sr, 0, sizeof(sr));
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sr.ref_value[0] = stencil & 0xff;
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pipe->bind_depth_stencil_alpha_state(pipe, ctx->dsa_write_depth_stencil);
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pipe->set_stencil_ref(pipe, &sr);
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}
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else
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pipe->bind_depth_stencil_alpha_state(pipe, ctx->dsa_keep_depth_stencil);
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@ -573,6 +555,7 @@ void util_blitter_clear(struct blitter_context *blitter,
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blitter_set_rectangle(ctx, 0, 0, width, height, depth);
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blitter_draw_quad(ctx);
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blitter_restore_CSOs(ctx);
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/* XXX driver's responsibility to restore stencil refs? */
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}
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static boolean
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@ -47,6 +47,7 @@ struct blitter_context
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void *saved_fs, *saved_vs; /**< fragment shader, vertex shader */
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struct pipe_framebuffer_state saved_fb_state; /**< framebuffer state */
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struct pipe_stencil_ref saved_stencil_ref; /**< stencil ref */
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int saved_num_sampler_states;
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void *saved_sampler_states[32];
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@ -169,6 +170,13 @@ void util_blitter_save_depth_stencil_alpha(struct blitter_context *blitter,
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blitter->saved_dsa_state = state;
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}
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static INLINE
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void util_blitter_save_stencil_ref(struct blitter_context *blitter,
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const struct pipe_stencil_ref *state)
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{
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blitter->saved_stencil_ref = *state;
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}
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static INLINE
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void util_blitter_save_rasterizer(struct blitter_context *blitter,
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void *state)
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@ -49,8 +49,9 @@ Non-CSO State
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These pieces of state are too small, variable, and/or trivial to have CSO
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objects. They all follow simple, one-method binding calls, e.g.
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``set_edgeflags``.
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``set_blend_color``.
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* ``set_stencil_ref`` sets the stencil front and back reference values
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which are used as comparison values in stencil test.
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* ``set_blend_color``
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* ``set_clip_state``
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* ``set_polygon_stipple``
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@ -11,9 +11,9 @@ they are all stored in one structure.
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During actual execution, the order of operations done on fragments is always:
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* Alpha
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* Stencil
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* Depth
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* Alpha
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Depth Members
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-------------
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@ -28,15 +28,18 @@ func
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Stencil Members
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---------------
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XXX document valuemask, writemask
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enabled
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Whether the stencil test is enabled. For the second stencil, whether the
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two-sided stencil is enabled.
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two-sided stencil is enabled. If two-sided stencil is disabled, the other
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fields for the second array member are not valid.
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func
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The stencil test function. One of PIPE_FUNC.
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ref_value
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Stencil test reference value; used for certain functions.
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valuemask
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Stencil test value mask; this is ANDed with the value in the stencil
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buffer and the reference value before doing the stencil comparison test.
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writemask
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Stencil test writemask; this controls which bits of the stencil buffer
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are written.
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fail_op
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The operation to carry out if the stencil test fails. One of
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PIPE_STENCIL_OP.
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@ -45,4 +45,6 @@ border_color
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RGBA color used for out-of-bounds coordinates.
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max_anisotropy
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Maximum filtering to apply anisotropically to textures. Setting this to
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1.0 effectively disables anisotropic filtering.
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0 disables anisotropic filtering. Any other setting enables anisotropic
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filtering, however it's not unexpected some drivers only will change their
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filtering with a setting of 2 and higher.
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@ -230,6 +230,7 @@ struct cell_command_rasterizer
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{
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opcode_t opcode; /**< CELL_CMD_STATE_RASTERIZER */
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struct pipe_rasterizer_state rasterizer;
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uint32_t pad[1];
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};
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@ -326,7 +327,7 @@ struct cell_command_sampler
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opcode_t opcode; /**< CELL_CMD_STATE_SAMPLER */
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uint unit;
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struct pipe_sampler_state state;
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uint32_t pad_[2];
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uint32_t pad_[3];
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};
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@ -114,6 +114,7 @@ struct cell_context
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struct spe_function logic_op;
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struct pipe_blend_color blend_color;
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struct pipe_stencil_ref stencil_ref;
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struct pipe_clip_state clip;
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struct pipe_buffer *constants[2];
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struct pipe_framebuffer_state framebuffer;
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@ -1175,7 +1175,8 @@ gen_colormask(struct spe_function *f,
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*/
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static void
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gen_stencil_test(struct spe_function *f,
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const struct pipe_stencil_state *state,
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const struct pipe_stencil_state *state,
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const unsigned ref_value,
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uint stencil_max_value,
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int fragment_mask_reg,
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int fbS_reg,
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@ -1189,7 +1190,7 @@ gen_stencil_test(struct spe_function *f,
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case PIPE_FUNC_EQUAL:
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if (state->valuemask == stencil_max_value) {
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/* stencil_pass = fragment_mask & (s == reference) */
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spe_compare_equal_uint(f, stencil_pass_reg, fbS_reg, state->ref_value);
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spe_compare_equal_uint(f, stencil_pass_reg, fbS_reg, ref_value);
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spe_and(f, stencil_pass_reg, fragment_mask_reg, stencil_pass_reg);
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}
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else {
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@ -1197,7 +1198,7 @@ gen_stencil_test(struct spe_function *f,
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uint tmp_masked_stencil = spe_allocate_available_register(f);
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spe_and_uint(f, tmp_masked_stencil, fbS_reg, state->valuemask);
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spe_compare_equal_uint(f, stencil_pass_reg, tmp_masked_stencil,
|
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state->valuemask & state->ref_value);
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state->valuemask & ref_value);
|
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spe_and(f, stencil_pass_reg, fragment_mask_reg, stencil_pass_reg);
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spe_release_register(f, tmp_masked_stencil);
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}
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@ -1206,7 +1207,7 @@ gen_stencil_test(struct spe_function *f,
|
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case PIPE_FUNC_NOTEQUAL:
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||||
if (state->valuemask == stencil_max_value) {
|
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/* stencil_pass = fragment_mask & ~(s == reference) */
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spe_compare_equal_uint(f, stencil_pass_reg, fbS_reg, state->ref_value);
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spe_compare_equal_uint(f, stencil_pass_reg, fbS_reg, ref_value);
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spe_andc(f, stencil_pass_reg, fragment_mask_reg, stencil_pass_reg);
|
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}
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else {
|
||||
|
|
@ -1214,7 +1215,7 @@ gen_stencil_test(struct spe_function *f,
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int tmp_masked_stencil = spe_allocate_available_register(f);
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||||
spe_and_uint(f, tmp_masked_stencil, fbS_reg, state->valuemask);
|
||||
spe_compare_equal_uint(f, stencil_pass_reg, tmp_masked_stencil,
|
||||
state->valuemask & state->ref_value);
|
||||
state->valuemask & ref_value);
|
||||
spe_andc(f, stencil_pass_reg, fragment_mask_reg, stencil_pass_reg);
|
||||
spe_release_register(f, tmp_masked_stencil);
|
||||
}
|
||||
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|
@ -1223,7 +1224,7 @@ gen_stencil_test(struct spe_function *f,
|
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case PIPE_FUNC_LESS:
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if (state->valuemask == stencil_max_value) {
|
||||
/* stencil_pass = fragment_mask & (reference < s) */
|
||||
spe_compare_greater_uint(f, stencil_pass_reg, fbS_reg, state->ref_value);
|
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spe_compare_greater_uint(f, stencil_pass_reg, fbS_reg, ref_value);
|
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spe_and(f, stencil_pass_reg, fragment_mask_reg, stencil_pass_reg);
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}
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else {
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|
@ -1231,7 +1232,7 @@ gen_stencil_test(struct spe_function *f,
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int tmp_masked_stencil = spe_allocate_available_register(f);
|
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spe_and_uint(f, tmp_masked_stencil, fbS_reg, state->valuemask);
|
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spe_compare_greater_uint(f, stencil_pass_reg, tmp_masked_stencil,
|
||||
state->valuemask & state->ref_value);
|
||||
state->valuemask & ref_value);
|
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spe_and(f, stencil_pass_reg, fragment_mask_reg, stencil_pass_reg);
|
||||
spe_release_register(f, tmp_masked_stencil);
|
||||
}
|
||||
|
|
@ -1246,7 +1247,7 @@ gen_stencil_test(struct spe_function *f,
|
|||
* treats its operands as unsigned - no sign extension.
|
||||
*/
|
||||
int tmp_reg = spe_allocate_available_register(f);
|
||||
spe_load_uint(f, tmp_reg, state->ref_value);
|
||||
spe_load_uint(f, tmp_reg, ref_value);
|
||||
spe_clgt(f, stencil_pass_reg, tmp_reg, fbS_reg);
|
||||
spe_and(f, stencil_pass_reg, fragment_mask_reg, stencil_pass_reg);
|
||||
spe_release_register(f, tmp_reg);
|
||||
|
|
@ -1255,7 +1256,7 @@ gen_stencil_test(struct spe_function *f,
|
|||
/* stencil_pass = fragment_mask & ((reference&mask) > (s&mask)) */
|
||||
int tmp_reg = spe_allocate_available_register(f);
|
||||
int tmp_masked_stencil = spe_allocate_available_register(f);
|
||||
spe_load_uint(f, tmp_reg, state->valuemask & state->ref_value);
|
||||
spe_load_uint(f, tmp_reg, state->valuemask & ref_value);
|
||||
spe_and_uint(f, tmp_masked_stencil, fbS_reg, state->valuemask);
|
||||
spe_clgt(f, stencil_pass_reg, tmp_reg, tmp_masked_stencil);
|
||||
spe_and(f, stencil_pass_reg, fragment_mask_reg, stencil_pass_reg);
|
||||
|
|
@ -1269,7 +1270,7 @@ gen_stencil_test(struct spe_function *f,
|
|||
/* stencil_pass = fragment_mask & (reference >= s)
|
||||
* = fragment_mask & ~(s > reference) */
|
||||
spe_compare_greater_uint(f, stencil_pass_reg, fbS_reg,
|
||||
state->ref_value);
|
||||
ref_value);
|
||||
spe_andc(f, stencil_pass_reg, fragment_mask_reg, stencil_pass_reg);
|
||||
}
|
||||
else {
|
||||
|
|
@ -1277,7 +1278,7 @@ gen_stencil_test(struct spe_function *f,
|
|||
int tmp_masked_stencil = spe_allocate_available_register(f);
|
||||
spe_and_uint(f, tmp_masked_stencil, fbS_reg, state->valuemask);
|
||||
spe_compare_greater_uint(f, stencil_pass_reg, tmp_masked_stencil,
|
||||
state->valuemask & state->ref_value);
|
||||
state->valuemask & ref_value);
|
||||
spe_andc(f, stencil_pass_reg, fragment_mask_reg, stencil_pass_reg);
|
||||
spe_release_register(f, tmp_masked_stencil);
|
||||
}
|
||||
|
|
@ -1289,7 +1290,7 @@ gen_stencil_test(struct spe_function *f,
|
|||
* = fragment_mask & ~(reference > s) */
|
||||
/* As above, we have to do this by loading a register */
|
||||
int tmp_reg = spe_allocate_available_register(f);
|
||||
spe_load_uint(f, tmp_reg, state->ref_value);
|
||||
spe_load_uint(f, tmp_reg, ref_value);
|
||||
spe_clgt(f, stencil_pass_reg, tmp_reg, fbS_reg);
|
||||
spe_andc(f, stencil_pass_reg, fragment_mask_reg, stencil_pass_reg);
|
||||
spe_release_register(f, tmp_reg);
|
||||
|
|
@ -1298,7 +1299,7 @@ gen_stencil_test(struct spe_function *f,
|
|||
/* stencil_pass = fragment_mask & ~((reference&mask) > (s&mask)) */
|
||||
int tmp_reg = spe_allocate_available_register(f);
|
||||
int tmp_masked_stencil = spe_allocate_available_register(f);
|
||||
spe_load_uint(f, tmp_reg, state->ref_value & state->valuemask);
|
||||
spe_load_uint(f, tmp_reg, ref_value & state->valuemask);
|
||||
spe_and_uint(f, tmp_masked_stencil, fbS_reg, state->valuemask);
|
||||
spe_clgt(f, stencil_pass_reg, tmp_reg, tmp_masked_stencil);
|
||||
spe_andc(f, stencil_pass_reg, fragment_mask_reg, stencil_pass_reg);
|
||||
|
|
@ -1453,6 +1454,7 @@ gen_stencil_values(struct spe_function *f,
|
|||
static void
|
||||
gen_get_stencil_values(struct spe_function *f,
|
||||
const struct pipe_stencil_state *stencil,
|
||||
const unsigned ref_value,
|
||||
const uint depth_enabled,
|
||||
int fbS_reg,
|
||||
int *fail_reg,
|
||||
|
|
@ -1488,7 +1490,7 @@ gen_get_stencil_values(struct spe_function *f,
|
|||
}
|
||||
else {
|
||||
*fail_reg = spe_allocate_available_register(f);
|
||||
gen_stencil_values(f, stencil->fail_op, stencil->ref_value,
|
||||
gen_stencil_values(f, stencil->fail_op, ref_value,
|
||||
0xff, fbS_reg, *fail_reg);
|
||||
}
|
||||
|
||||
|
|
@ -1501,7 +1503,7 @@ gen_get_stencil_values(struct spe_function *f,
|
|||
}
|
||||
else {
|
||||
*zfail_reg = spe_allocate_available_register(f);
|
||||
gen_stencil_values(f, stencil->zfail_op, stencil->ref_value,
|
||||
gen_stencil_values(f, stencil->zfail_op, ref_value,
|
||||
0xff, fbS_reg, *zfail_reg);
|
||||
}
|
||||
|
||||
|
|
@ -1516,7 +1518,7 @@ gen_get_stencil_values(struct spe_function *f,
|
|||
}
|
||||
else {
|
||||
*zpass_reg = spe_allocate_available_register(f);
|
||||
gen_stencil_values(f, stencil->zpass_op, stencil->ref_value,
|
||||
gen_stencil_values(f, stencil->zpass_op, ref_value,
|
||||
0xff, fbS_reg, *zpass_reg);
|
||||
}
|
||||
}
|
||||
|
|
@ -1528,7 +1530,8 @@ gen_get_stencil_values(struct spe_function *f,
|
|||
*/
|
||||
static boolean
|
||||
gen_stencil_depth_test(struct spe_function *f,
|
||||
const struct pipe_depth_stencil_alpha_state *dsa,
|
||||
const struct pipe_depth_stencil_alpha_state *dsa,
|
||||
const struct pipe_stencil_ref *stencil_ref,
|
||||
const uint facing,
|
||||
const int mask_reg, const int fragZ_reg,
|
||||
const int fbZ_reg, const int fbS_reg)
|
||||
|
|
@ -1551,6 +1554,7 @@ gen_stencil_depth_test(struct spe_function *f,
|
|||
int stencil_writemask_reg;
|
||||
int zmask_reg;
|
||||
int newS_reg;
|
||||
unsigned ref_value;
|
||||
|
||||
/* Stenciling is quite complex: up to six different configurable stencil
|
||||
* operations/calculations can be required (three each for front-facing
|
||||
|
|
@ -1579,9 +1583,11 @@ gen_stencil_depth_test(struct spe_function *f,
|
|||
*/
|
||||
if (facing == CELL_FACING_BACK && dsa->stencil[1].enabled) {
|
||||
stencil = &dsa->stencil[1];
|
||||
ref_value = stencil_ref->ref_value[1];
|
||||
}
|
||||
else {
|
||||
stencil = &dsa->stencil[0];
|
||||
ref_value = stencil_ref->ref_value[0];
|
||||
}
|
||||
|
||||
/* Calculate the writemask. If the writemask is trivial (either
|
||||
|
|
@ -1641,7 +1647,7 @@ gen_stencil_depth_test(struct spe_function *f,
|
|||
*/
|
||||
spe_comment(f, 0, "Running basic stencil test");
|
||||
stencil_pass_reg = spe_allocate_available_register(f);
|
||||
gen_stencil_test(f, stencil, 0xff, mask_reg, fbS_reg, stencil_pass_reg);
|
||||
gen_stencil_test(f, stencil, ref_value, 0xff, mask_reg, fbS_reg, stencil_pass_reg);
|
||||
|
||||
/* Generate code that, given the mask of valid fragments and the
|
||||
* mask of valid fragments that passed the stencil test, computes
|
||||
|
|
@ -1678,7 +1684,7 @@ gen_stencil_depth_test(struct spe_function *f,
|
|||
spe_comment(f, 0, facing == CELL_FACING_FRONT
|
||||
? "Computing front-facing stencil values"
|
||||
: "Computing back-facing stencil values");
|
||||
gen_get_stencil_values(f, stencil, dsa->depth.enabled, fbS_reg,
|
||||
gen_get_stencil_values(f, stencil, ref_value, dsa->depth.enabled, fbS_reg,
|
||||
&stencil_fail_values, &stencil_pass_depth_fail_values,
|
||||
&stencil_pass_depth_pass_values);
|
||||
}
|
||||
|
|
@ -1818,6 +1824,7 @@ gen_stencil_depth_test(struct spe_function *f,
|
|||
static void
|
||||
gen_depth_stencil(struct cell_context *cell,
|
||||
const struct pipe_depth_stencil_alpha_state *dsa,
|
||||
const struct pipe_stencil_ref *stencil_ref,
|
||||
struct spe_function *f,
|
||||
uint facing,
|
||||
int mask_reg,
|
||||
|
|
@ -1940,7 +1947,7 @@ gen_depth_stencil(struct cell_context *cell,
|
|||
* gen_stencil_depth_test() function must ignore the
|
||||
* fbZ_reg register if depth is not enabled.
|
||||
*/
|
||||
write_depth_stencil = gen_stencil_depth_test(f, dsa, facing,
|
||||
write_depth_stencil = gen_stencil_depth_test(f, dsa, stencil_ref, facing,
|
||||
mask_reg, fragZ_reg,
|
||||
fbZ_reg, fbS_reg);
|
||||
}
|
||||
|
|
@ -2029,6 +2036,7 @@ cell_gen_fragment_function(struct cell_context *cell,
|
|||
struct spe_function *f)
|
||||
{
|
||||
const struct pipe_depth_stencil_alpha_state *dsa = cell->depth_stencil;
|
||||
const struct pipe_stencil_ref *stencil_ref = &cell->stencil_ref;
|
||||
const struct pipe_blend_state *blend = cell->blend;
|
||||
const struct pipe_blend_color *blend_color = &cell->blend_color;
|
||||
const enum pipe_format color_format = cell->framebuffer.cbufs[0]->format;
|
||||
|
|
@ -2101,7 +2109,7 @@ cell_gen_fragment_function(struct cell_context *cell,
|
|||
|
||||
/* generate depth and/or stencil test code */
|
||||
if (dsa->depth.enabled || dsa->stencil[0].enabled) {
|
||||
gen_depth_stencil(cell, dsa, f,
|
||||
gen_depth_stencil(cell, dsa, stencil_ref, f,
|
||||
facing,
|
||||
mask_reg,
|
||||
depth_tile_reg,
|
||||
|
|
|
|||
|
|
@ -112,6 +112,19 @@ cell_delete_depth_stencil_alpha_state(struct pipe_context *pipe, void *dsa)
|
|||
}
|
||||
|
||||
|
||||
static void
|
||||
cell_set_stencil_ref(struct pipe_context *pipe,
|
||||
const struct pipe_stencil_ref *stencil_ref)
|
||||
{
|
||||
struct cell_context *cell = cell_context(pipe);
|
||||
|
||||
draw_flush(cell->draw);
|
||||
|
||||
cell->stencil_ref = *stencil_ref;
|
||||
|
||||
cell->dirty |= CELL_NEW_DEPTH_STENCIL;
|
||||
}
|
||||
|
||||
static void
|
||||
cell_set_clip_state(struct pipe_context *pipe,
|
||||
const struct pipe_clip_state *clip)
|
||||
|
|
@ -397,6 +410,7 @@ cell_init_state_functions(struct cell_context *cell)
|
|||
cell->pipe.delete_rasterizer_state = cell_delete_rasterizer_state;
|
||||
|
||||
cell->pipe.set_blend_color = cell_set_blend_color;
|
||||
cell->pipe.set_stencil_ref = cell_set_stencil_ref;
|
||||
cell->pipe.set_clip_state = cell_set_clip_state;
|
||||
|
||||
cell->pipe.set_framebuffer_state = cell_set_framebuffer_state;
|
||||
|
|
|
|||
|
|
@ -33,6 +33,7 @@
|
|||
#include "pipe/p_screen.h"
|
||||
|
||||
#include "cell/common.h"
|
||||
#include "cell_context.h"
|
||||
#include "cell_screen.h"
|
||||
#include "cell_texture.h"
|
||||
#include "cell_winsys.h"
|
||||
|
|
|
|||
|
|
@ -282,6 +282,7 @@ emit_stencil_op(struct spe_function *f,
|
|||
*/
|
||||
static int
|
||||
emit_stencil_test(struct pipe_depth_stencil_alpha_state *dsa,
|
||||
struct pipe_stencil_ref *sr,
|
||||
unsigned face,
|
||||
struct spe_function *f,
|
||||
int mask,
|
||||
|
|
@ -296,7 +297,7 @@ emit_stencil_test(struct pipe_depth_stencil_alpha_state *dsa,
|
|||
int stencil_pass = spe_allocate_available_register(f);
|
||||
int face_stencil = spe_allocate_available_register(f);
|
||||
int stencil_src = stencil;
|
||||
const unsigned ref = (dsa->stencil[face].ref_value
|
||||
const unsigned ref = (sr->ref_value[face]
|
||||
& dsa->stencil[face].valuemask);
|
||||
boolean complement = FALSE;
|
||||
int stored;
|
||||
|
|
@ -406,7 +407,7 @@ emit_stencil_test(struct pipe_depth_stencil_alpha_state *dsa,
|
|||
|
||||
emit_stencil_op(f, face_stencil, stencil_src, stencil_fail,
|
||||
dsa->stencil[face].fail_op,
|
||||
dsa->stencil[face].ref_value);
|
||||
sr->ref_value[face]);
|
||||
|
||||
stencil_src = face_stencil;
|
||||
}
|
||||
|
|
@ -421,7 +422,7 @@ emit_stencil_test(struct pipe_depth_stencil_alpha_state *dsa,
|
|||
|
||||
emit_stencil_op(f, face_stencil, stencil_src, depth_fail,
|
||||
dsa->stencil[face].zfail_op,
|
||||
dsa->stencil[face].ref_value);
|
||||
sr->ref_value[face]);
|
||||
stencil_src = face_stencil;
|
||||
}
|
||||
|
||||
|
|
@ -429,7 +430,7 @@ emit_stencil_test(struct pipe_depth_stencil_alpha_state *dsa,
|
|||
&& (dsa->stencil[face].zpass_op != PIPE_STENCIL_OP_KEEP)) {
|
||||
emit_stencil_op(f, face_stencil, stencil_src, depth_pass,
|
||||
dsa->stencil[face].zpass_op,
|
||||
dsa->stencil[face].ref_value);
|
||||
sr->ref_value[face]);
|
||||
stencil_src = face_stencil;
|
||||
}
|
||||
}
|
||||
|
|
@ -463,7 +464,8 @@ emit_stencil_test(struct pipe_depth_stencil_alpha_state *dsa,
|
|||
|
||||
|
||||
void
|
||||
cell_generate_depth_stencil_test(struct cell_depth_stencil_alpha_state *cdsa)
|
||||
cell_generate_depth_stencil_test(struct cell_depth_stencil_alpha_state *cdsa,
|
||||
struct pipe_stencil_ref *sr)
|
||||
{
|
||||
struct pipe_depth_stencil_alpha_state *const dsa = &cdsa->base;
|
||||
struct spe_function *const f = &cdsa->code;
|
||||
|
|
@ -499,13 +501,13 @@ cell_generate_depth_stencil_test(struct cell_depth_stencil_alpha_state *cdsa)
|
|||
|
||||
if (dsa->stencil[0].enabled) {
|
||||
const int front_depth_pass = spe_allocate_available_register(f);
|
||||
int front_stencil = emit_stencil_test(dsa, 0, f, mask,
|
||||
int front_stencil = emit_stencil_test(dsa, sr, 0, f, mask,
|
||||
depth_mask, depth_complement,
|
||||
stencil, front_depth_pass);
|
||||
|
||||
if (dsa->stencil[1].enabled) {
|
||||
const int back_depth_pass = spe_allocate_available_register(f);
|
||||
int back_stencil = emit_stencil_test(dsa, 1, f, mask,
|
||||
int back_stencil = emit_stencil_test(dsa, sr, 1, f, mask,
|
||||
depth_mask, depth_complement,
|
||||
stencil, back_depth_pass);
|
||||
|
||||
|
|
@ -579,7 +581,7 @@ cell_generate_depth_stencil_test(struct cell_depth_stencil_alpha_state *cdsa)
|
|||
dsa->stencil[i].zfail_op,
|
||||
dsa->stencil[i].zpass_op);
|
||||
printf("# ref value / value mask / write mask: %02x %02x %02x\n",
|
||||
dsa->stencil[i].ref_value,
|
||||
sr->ref_value[i],
|
||||
dsa->stencil[i].valuemask,
|
||||
dsa->stencil[i].writemask);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -51,9 +51,10 @@
|
|||
#define FO_NEW_VERTEX 0x2000
|
||||
#define FO_NEW_VERTEX_SHADER 0x4000
|
||||
#define FO_NEW_BLEND_COLOR 0x8000
|
||||
#define FO_NEW_CLEAR_COLOR 0x10000
|
||||
#define FO_NEW_VERTEX_BUFFER 0x20000
|
||||
#define FO_NEW_VERTEX_ELEMENT 0x40000
|
||||
#define FO_NEW_STENCIL_REF 0x10000
|
||||
#define FO_NEW_CLEAR_COLOR 0x20000
|
||||
#define FO_NEW_VERTEX_BUFFER 0x40000
|
||||
#define FO_NEW_VERTEX_ELEMENT 0x80000
|
||||
|
||||
|
||||
|
||||
|
|
@ -79,6 +80,7 @@ struct failover_context {
|
|||
const struct fo_state *vertex_shader;
|
||||
|
||||
struct pipe_blend_color blend_color;
|
||||
struct pipe_stencil_ref stencil_ref;
|
||||
struct pipe_clip_state clip;
|
||||
struct pipe_framebuffer_state framebuffer;
|
||||
struct pipe_poly_stipple poly_stipple;
|
||||
|
|
|
|||
|
|
@ -90,7 +90,7 @@ failover_delete_blend_state( struct pipe_context *pipe,
|
|||
|
||||
static void
|
||||
failover_set_blend_color( struct pipe_context *pipe,
|
||||
const struct pipe_blend_color *blend_color )
|
||||
const struct pipe_blend_color *blend_color )
|
||||
{
|
||||
struct failover_context *failover = failover_context(pipe);
|
||||
|
||||
|
|
@ -100,9 +100,21 @@ failover_set_blend_color( struct pipe_context *pipe,
|
|||
failover->hw->set_blend_color( failover->hw, blend_color );
|
||||
}
|
||||
|
||||
static void
|
||||
failover_set_stencil_ref( struct pipe_context *pipe,
|
||||
const struct pipe_stencil_ref *stencil_ref )
|
||||
{
|
||||
struct failover_context *failover = failover_context(pipe);
|
||||
|
||||
failover->stencil_ref = *stencil_ref;
|
||||
failover->dirty |= FO_NEW_STENCIL_REF;
|
||||
failover->sw->set_stencil_ref( failover->sw, stencil_ref );
|
||||
failover->hw->set_stencil_ref( failover->hw, stencil_ref );
|
||||
}
|
||||
|
||||
static void
|
||||
failover_set_clip_state( struct pipe_context *pipe,
|
||||
const struct pipe_clip_state *clip )
|
||||
const struct pipe_clip_state *clip )
|
||||
{
|
||||
struct failover_context *failover = failover_context(pipe);
|
||||
|
||||
|
|
@ -533,6 +545,7 @@ failover_init_state_functions( struct failover_context *failover )
|
|||
failover->pipe.delete_vs_state = failover_delete_vs_state;
|
||||
|
||||
failover->pipe.set_blend_color = failover_set_blend_color;
|
||||
failover->pipe.set_stencil_ref = failover_set_stencil_ref;
|
||||
failover->pipe.set_clip_state = failover_set_clip_state;
|
||||
failover->pipe.set_framebuffer_state = failover_set_framebuffer_state;
|
||||
failover->pipe.set_polygon_stipple = failover_set_polygon_stipple;
|
||||
|
|
|
|||
|
|
@ -65,7 +65,10 @@ failover_state_emit( struct failover_context *failover )
|
|||
|
||||
if (failover->dirty & FO_NEW_DEPTH_STENCIL)
|
||||
failover->sw->bind_depth_stencil_alpha_state( failover->sw,
|
||||
failover->depth_stencil->sw_state );
|
||||
failover->depth_stencil->sw_state );
|
||||
|
||||
if (failover->dirty & FO_NEW_STENCIL_REF)
|
||||
failover->sw->set_stencil_ref( failover->sw, &failover->stencil_ref );
|
||||
|
||||
if (failover->dirty & FO_NEW_FRAMEBUFFER)
|
||||
failover->sw->set_framebuffer_state( failover->sw, &failover->framebuffer );
|
||||
|
|
|
|||
|
|
@ -232,6 +232,7 @@ struct i915_context
|
|||
struct i915_fragment_shader *fs;
|
||||
|
||||
struct pipe_blend_color blend_color;
|
||||
struct pipe_stencil_ref stencil_ref;
|
||||
struct pipe_clip_state clip;
|
||||
/* XXX unneded */
|
||||
struct pipe_buffer *constants[PIPE_SHADER_TYPES];
|
||||
|
|
|
|||
|
|
@ -190,7 +190,7 @@ static void i915_delete_blend_state(struct pipe_context *pipe, void *blend)
|
|||
}
|
||||
|
||||
static void i915_set_blend_color( struct pipe_context *pipe,
|
||||
const struct pipe_blend_color *blend_color )
|
||||
const struct pipe_blend_color *blend_color )
|
||||
{
|
||||
struct i915_context *i915 = i915_context(pipe);
|
||||
draw_flush(i915->draw);
|
||||
|
|
@ -200,6 +200,17 @@ static void i915_set_blend_color( struct pipe_context *pipe,
|
|||
i915->dirty |= I915_NEW_BLEND;
|
||||
}
|
||||
|
||||
static void i915_set_stencil_ref( struct pipe_context *pipe,
|
||||
const struct pipe_stencil_ref *stencil_ref )
|
||||
{
|
||||
struct i915_context *i915 = i915_context(pipe);
|
||||
draw_flush(i915->draw);
|
||||
|
||||
i915->stencil_ref = *stencil_ref;
|
||||
|
||||
i915->dirty |= I915_NEW_DEPTH_STENCIL;
|
||||
}
|
||||
|
||||
static void *
|
||||
i915_create_sampler_state(struct pipe_context *pipe,
|
||||
const struct pipe_sampler_state *sampler)
|
||||
|
|
@ -217,10 +228,10 @@ i915_create_sampler_state(struct pipe_context *pipe,
|
|||
minFilt = translate_img_filter( sampler->min_img_filter );
|
||||
magFilt = translate_img_filter( sampler->mag_img_filter );
|
||||
|
||||
if (sampler->max_anisotropy > 1.0)
|
||||
if (sampler->max_anisotropy > 1)
|
||||
minFilt = magFilt = FILTER_ANISOTROPIC;
|
||||
|
||||
if (sampler->max_anisotropy > 2.0) {
|
||||
if (sampler->max_anisotropy > 2) {
|
||||
cso->state[0] |= SS2_MAX_ANISO_4;
|
||||
}
|
||||
|
||||
|
|
@ -334,11 +345,9 @@ i915_create_depth_stencil_state(struct pipe_context *pipe,
|
|||
int fop = i915_translate_stencil_op(depth_stencil->stencil[0].fail_op);
|
||||
int dfop = i915_translate_stencil_op(depth_stencil->stencil[0].zfail_op);
|
||||
int dpop = i915_translate_stencil_op(depth_stencil->stencil[0].zpass_op);
|
||||
int ref = depth_stencil->stencil[0].ref_value & 0xff;
|
||||
|
||||
cso->stencil_LIS5 |= (S5_STENCIL_TEST_ENABLE |
|
||||
S5_STENCIL_WRITE_ENABLE |
|
||||
(ref << S5_STENCIL_REF_SHIFT) |
|
||||
(test << S5_STENCIL_TEST_FUNC_SHIFT) |
|
||||
(fop << S5_STENCIL_FAIL_SHIFT) |
|
||||
(dfop << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
|
||||
|
|
@ -350,7 +359,6 @@ i915_create_depth_stencil_state(struct pipe_context *pipe,
|
|||
int fop = i915_translate_stencil_op(depth_stencil->stencil[1].fail_op);
|
||||
int dfop = i915_translate_stencil_op(depth_stencil->stencil[1].zfail_op);
|
||||
int dpop = i915_translate_stencil_op(depth_stencil->stencil[1].zpass_op);
|
||||
int ref = depth_stencil->stencil[1].ref_value & 0xff;
|
||||
int tmask = depth_stencil->stencil[1].valuemask & 0xff;
|
||||
int wmask = depth_stencil->stencil[1].writemask & 0xff;
|
||||
|
||||
|
|
@ -359,7 +367,6 @@ i915_create_depth_stencil_state(struct pipe_context *pipe,
|
|||
BFO_ENABLE_STENCIL_TWO_SIDE |
|
||||
BFO_ENABLE_STENCIL_REF |
|
||||
BFO_STENCIL_TWO_SIDE |
|
||||
(ref << BFO_STENCIL_REF_SHIFT) |
|
||||
(test << BFO_STENCIL_TEST_SHIFT) |
|
||||
(fop << BFO_STENCIL_FAIL_SHIFT) |
|
||||
(dfop << BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
|
||||
|
|
@ -777,6 +784,7 @@ i915_init_state_functions( struct i915_context *i915 )
|
|||
i915->base.delete_vs_state = i915_delete_vs_state;
|
||||
|
||||
i915->base.set_blend_color = i915_set_blend_color;
|
||||
i915->base.set_stencil_ref = i915_set_stencil_ref;
|
||||
i915->base.set_clip_state = i915_set_clip_state;
|
||||
i915->base.set_constant_buffer = i915_set_constant_buffer;
|
||||
i915->base.set_framebuffer_state = i915_set_framebuffer_state;
|
||||
|
|
|
|||
|
|
@ -94,9 +94,16 @@ const struct i915_tracked_state i915_upload_MODES4 = {
|
|||
|
||||
static void upload_BFO( struct i915_context *i915 )
|
||||
{
|
||||
unsigned bfo[2];
|
||||
bfo[0] = i915->depth_stencil->bfo[0];
|
||||
bfo[1] = i915->depth_stencil->bfo[1];
|
||||
/* I don't get it only allowed to set a ref mask when the enable bit is set? */
|
||||
if (bfo[0] & BFO_ENABLE_STENCIL_REF) {
|
||||
bfo[0] |= i915->stencil_ref.ref_value[1] << BFO_STENCIL_REF_SHIFT;
|
||||
}
|
||||
set_dynamic_indirect( i915,
|
||||
I915_DYNAMIC_BFO_0,
|
||||
&(i915->depth_stencil->bfo[0]),
|
||||
&(bfo[0]),
|
||||
2 );
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -129,6 +129,8 @@ static void upload_S5( struct i915_context *i915 )
|
|||
unsigned LIS5 = 0;
|
||||
|
||||
LIS5 |= i915->depth_stencil->stencil_LIS5;
|
||||
/* hope it's safe to set stencil ref value even if stencil test is disabled? */
|
||||
LIS5 |= i915->stencil_ref.ref_value[0] << S5_STENCIL_REF_SHIFT;
|
||||
|
||||
LIS5 |= i915->blend->LIS5;
|
||||
|
||||
|
|
|
|||
|
|
@ -65,14 +65,33 @@ combine_cc3( struct brw_cc3 a, struct brw_cc3 b )
|
|||
return ca.cc3;
|
||||
}
|
||||
|
||||
static INLINE struct brw_cc1
|
||||
combine_cc1( struct brw_cc1 a, struct brw_cc1 b )
|
||||
{
|
||||
union { struct brw_cc1 cc1; unsigned i; } ca, cb;
|
||||
ca.cc1 = a;
|
||||
cb.cc1 = b;
|
||||
ca.i |= cb.i;
|
||||
return ca.cc1;
|
||||
}
|
||||
|
||||
static INLINE struct brw_cc2
|
||||
combine_cc2( struct brw_cc2 a, struct brw_cc2 b )
|
||||
{
|
||||
union { struct brw_cc2 cc2; unsigned i; } ca, cb;
|
||||
ca.cc2 = a;
|
||||
cb.cc2 = b;
|
||||
ca.i |= cb.i;
|
||||
return ca.cc2;
|
||||
}
|
||||
|
||||
static int prepare_cc_unit( struct brw_context *brw )
|
||||
{
|
||||
brw->cc.cc.cc0 = brw->curr.zstencil->cc0;
|
||||
brw->cc.cc.cc1 = brw->curr.zstencil->cc1;
|
||||
brw->cc.cc.cc2 = brw->curr.zstencil->cc2;
|
||||
brw->cc.cc.cc1 = combine_cc1( brw->curr.zstencil->cc1, brw->curr.cc1_stencil_ref );
|
||||
brw->cc.cc.cc2 = combine_cc2( brw->curr.zstencil->cc2, brw->curr.blend->cc2 );
|
||||
brw->cc.cc.cc3 = combine_cc3( brw->curr.zstencil->cc3, brw->curr.blend->cc3 );
|
||||
|
||||
|
||||
brw->cc.cc.cc5 = brw->curr.blend->cc5;
|
||||
brw->cc.cc.cc6 = brw->curr.blend->cc6;
|
||||
brw->cc.cc.cc7 = brw->curr.zstencil->cc7;
|
||||
|
|
|
|||
|
|
@ -153,7 +153,6 @@ struct brw_blend_state {
|
|||
struct brw_surf_ss0 ss0;
|
||||
};
|
||||
|
||||
|
||||
struct brw_rasterizer_state;
|
||||
|
||||
struct brw_immediate_data {
|
||||
|
|
@ -560,12 +559,14 @@ struct brw_context
|
|||
|
||||
struct pipe_scissor_state scissor;
|
||||
struct pipe_viewport_state viewport;
|
||||
struct pipe_stencil_ref stencil_ref;
|
||||
struct pipe_framebuffer_state fb;
|
||||
struct pipe_clip_state ucp;
|
||||
struct pipe_buffer *vertex_constants;
|
||||
struct pipe_buffer *fragment_constants;
|
||||
|
||||
struct brw_blend_constant_color bcc;
|
||||
struct brw_cc1 cc1_stencil_ref;
|
||||
struct brw_polygon_stipple bps;
|
||||
struct brw_cc_viewport ccv;
|
||||
|
||||
|
|
|
|||
|
|
@ -72,7 +72,6 @@ static void create_bcc_state( struct brw_depth_stencil_state *zstencil,
|
|||
translate_stencil_op(templ->stencil[0].zfail_op);
|
||||
zstencil->cc0.stencil_pass_depth_pass_op =
|
||||
translate_stencil_op(templ->stencil[0].zpass_op);
|
||||
zstencil->cc1.stencil_ref = templ->stencil[0].ref_value;
|
||||
zstencil->cc1.stencil_write_mask = templ->stencil[0].writemask;
|
||||
zstencil->cc1.stencil_test_mask = templ->stencil[0].valuemask;
|
||||
|
||||
|
|
@ -86,7 +85,6 @@ static void create_bcc_state( struct brw_depth_stencil_state *zstencil,
|
|||
translate_stencil_op(templ->stencil[1].zfail_op);
|
||||
zstencil->cc0.bf_stencil_pass_depth_pass_op =
|
||||
translate_stencil_op(templ->stencil[1].zpass_op);
|
||||
zstencil->cc1.bf_stencil_ref = templ->stencil[1].ref_value;
|
||||
zstencil->cc2.bf_stencil_write_mask = templ->stencil[1].writemask;
|
||||
zstencil->cc2.bf_stencil_test_mask = templ->stencil[1].valuemask;
|
||||
}
|
||||
|
|
@ -159,9 +157,19 @@ static void brw_delete_depth_stencil_state(struct pipe_context *pipe,
|
|||
FREE(cso);
|
||||
}
|
||||
|
||||
static void brw_set_stencil_ref(struct pipe_context *pipe,
|
||||
const struct pipe_stencil_ref *stencil_ref)
|
||||
{
|
||||
struct brw_context *brw = brw_context(pipe);
|
||||
brw->curr.cc1_stencil_ref.stencil_ref = stencil_ref->ref_value[0];
|
||||
brw->curr.cc1_stencil_ref.bf_stencil_ref = stencil_ref->ref_value[1];
|
||||
|
||||
brw->state.dirty.mesa |= PIPE_NEW_DEPTH_STENCIL_ALPHA;
|
||||
}
|
||||
|
||||
void brw_pipe_depth_stencil_init( struct brw_context *brw )
|
||||
{
|
||||
brw->base.set_stencil_ref = brw_set_stencil_ref;
|
||||
brw->base.create_depth_stencil_alpha_state = brw_create_depth_stencil_state;
|
||||
brw->base.bind_depth_stencil_alpha_state = brw_bind_depth_stencil_state;
|
||||
brw->base.delete_depth_stencil_alpha_state = brw_delete_depth_stencil_state;
|
||||
|
|
|
|||
|
|
@ -114,14 +114,12 @@ brw_create_sampler_state( struct pipe_context *pipe,
|
|||
|
||||
/* XXX: anisotropy logic slightly changed:
|
||||
*/
|
||||
if (template->max_anisotropy > 1.0) {
|
||||
if (template->max_anisotropy > 1) {
|
||||
sampler->ss0.min_filter = BRW_MAPFILTER_ANISOTROPIC;
|
||||
sampler->ss0.mag_filter = BRW_MAPFILTER_ANISOTROPIC;
|
||||
|
||||
if (template->max_anisotropy > 2.0) {
|
||||
sampler->ss3.max_aniso = MIN2((template->max_anisotropy - 2) / 2,
|
||||
BRW_ANISORATIO_16);
|
||||
}
|
||||
sampler->ss3.max_aniso = MIN2((template->max_anisotropy - 2) / 2,
|
||||
BRW_ANISORATIO_16);
|
||||
}
|
||||
|
||||
sampler->ss1.r_wrap_mode = translate_wrap_mode(template->wrap_r);
|
||||
|
|
|
|||
|
|
@ -388,6 +388,17 @@ identity_set_blend_color(struct pipe_context *_pipe,
|
|||
blend_color);
|
||||
}
|
||||
|
||||
static void
|
||||
identity_set_stencil_ref(struct pipe_context *_pipe,
|
||||
const struct pipe_stencil_ref *stencil_ref)
|
||||
{
|
||||
struct identity_context *id_pipe = identity_context(_pipe);
|
||||
struct pipe_context *pipe = id_pipe->pipe;
|
||||
|
||||
pipe->set_stencil_ref(pipe,
|
||||
stencil_ref);
|
||||
}
|
||||
|
||||
static void
|
||||
identity_set_clip_state(struct pipe_context *_pipe,
|
||||
const struct pipe_clip_state *clip)
|
||||
|
|
@ -723,6 +734,7 @@ identity_context_create(struct pipe_screen *_screen, struct pipe_context *pipe)
|
|||
id_pipe->base.bind_vs_state = identity_bind_vs_state;
|
||||
id_pipe->base.delete_vs_state = identity_delete_vs_state;
|
||||
id_pipe->base.set_blend_color = identity_set_blend_color;
|
||||
id_pipe->base.set_stencil_ref = identity_set_stencil_ref;
|
||||
id_pipe->base.set_clip_state = identity_set_clip_state;
|
||||
id_pipe->base.set_constant_buffer = identity_set_constant_buffer;
|
||||
id_pipe->base.set_framebuffer_state = identity_set_framebuffer_state;
|
||||
|
|
|
|||
|
|
@ -146,6 +146,7 @@ llvmpipe_create_context( struct pipe_screen *screen, void *priv )
|
|||
llvmpipe->pipe.delete_vs_state = llvmpipe_delete_vs_state;
|
||||
|
||||
llvmpipe->pipe.set_blend_color = llvmpipe_set_blend_color;
|
||||
llvmpipe->pipe.set_stencil_ref = llvmpipe_set_stencil_ref;
|
||||
llvmpipe->pipe.set_clip_state = llvmpipe_set_clip_state;
|
||||
llvmpipe->pipe.set_constant_buffer = llvmpipe_set_constant_buffer;
|
||||
llvmpipe->pipe.set_framebuffer_state = llvmpipe_set_framebuffer_state;
|
||||
|
|
|
|||
|
|
@ -61,6 +61,7 @@ struct llvmpipe_context {
|
|||
|
||||
/** Other rendering state */
|
||||
struct pipe_blend_color blend_color;
|
||||
struct pipe_stencil_ref stencil_ref;
|
||||
struct pipe_clip_state clip;
|
||||
struct pipe_buffer *constants[PIPE_SHADER_TYPES];
|
||||
struct pipe_framebuffer_state framebuffer;
|
||||
|
|
|
|||
|
|
@ -152,13 +152,16 @@ void llvmpipe_bind_rasterizer_state(struct pipe_context *, void *);
|
|||
void llvmpipe_delete_rasterizer_state(struct pipe_context *, void *);
|
||||
|
||||
void llvmpipe_set_framebuffer_state( struct pipe_context *,
|
||||
const struct pipe_framebuffer_state * );
|
||||
const struct pipe_framebuffer_state * );
|
||||
|
||||
void llvmpipe_set_blend_color( struct pipe_context *pipe,
|
||||
const struct pipe_blend_color *blend_color );
|
||||
|
||||
void llvmpipe_set_stencil_ref( struct pipe_context *pipe,
|
||||
const struct pipe_stencil_ref *stencil_ref );
|
||||
|
||||
void llvmpipe_set_clip_state( struct pipe_context *,
|
||||
const struct pipe_clip_state * );
|
||||
const struct pipe_clip_state * );
|
||||
|
||||
void llvmpipe_set_constant_buffer(struct pipe_context *,
|
||||
uint shader, uint index,
|
||||
|
|
|
|||
|
|
@ -121,3 +121,24 @@ llvmpipe_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
|
|||
{
|
||||
FREE( depth );
|
||||
}
|
||||
|
||||
void llvmpipe_set_stencil_ref( struct pipe_context *pipe,
|
||||
const struct pipe_stencil_ref *stencil_ref )
|
||||
{
|
||||
struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe);
|
||||
|
||||
if(!stencil_ref)
|
||||
return;
|
||||
|
||||
if(memcmp(&llvmpipe->stencil_ref, stencil_ref, sizeof *stencil_ref) == 0)
|
||||
return;
|
||||
|
||||
draw_flush(llvmpipe->draw);
|
||||
|
||||
memcpy(&llvmpipe->stencil_ref, stencil_ref, sizeof *stencil_ref);
|
||||
|
||||
/* not sure. want new flag? */
|
||||
llvmpipe->dirty |= LP_NEW_DEPTH_STENCIL_ALPHA;
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -61,7 +61,8 @@ enum nv30_state_index {
|
|||
NV30_STATE_VTXBUF = 31,
|
||||
NV30_STATE_VTXFMT = 32,
|
||||
NV30_STATE_VTXATTR = 33,
|
||||
NV30_STATE_MAX = 34
|
||||
NV30_STATE_SR = 34,
|
||||
NV30_STATE_MAX = 35
|
||||
};
|
||||
|
||||
#include "nv30_screen.h"
|
||||
|
|
@ -79,6 +80,7 @@ enum nv30_state_index {
|
|||
#define NV30_NEW_FRAGPROG (1 << 10)
|
||||
#define NV30_NEW_ARRAYS (1 << 11)
|
||||
#define NV30_NEW_UCP (1 << 12)
|
||||
#define NV30_NEW_SR (1 << 13)
|
||||
|
||||
struct nv30_rasterizer_state {
|
||||
struct pipe_rasterizer_state pipe;
|
||||
|
|
@ -129,6 +131,7 @@ struct nv30_context {
|
|||
struct nv30_zsa_state *zsa;
|
||||
struct nv30_blend_state *blend;
|
||||
struct pipe_blend_color blend_colour;
|
||||
struct pipe_stencil_ref stencil_ref;
|
||||
struct pipe_viewport_state viewport;
|
||||
struct pipe_framebuffer_state framebuffer;
|
||||
struct pipe_buffer *idxbuf;
|
||||
|
|
@ -194,6 +197,7 @@ extern struct nv30_state_entry nv30_state_viewport;
|
|||
extern struct nv30_state_entry nv30_state_framebuffer;
|
||||
extern struct nv30_state_entry nv30_state_fragtex;
|
||||
extern struct nv30_state_entry nv30_state_vbo;
|
||||
extern struct nv30_state_entry nv30_state_sr;
|
||||
|
||||
/* nv30_vbo.c */
|
||||
extern void nv30_draw_arrays(struct pipe_context *, unsigned mode,
|
||||
|
|
|
|||
|
|
@ -139,13 +139,13 @@ nv30_sampler_state_create(struct pipe_context *pipe,
|
|||
|
||||
ps->en = 0;
|
||||
|
||||
if (cso->max_anisotropy >= 8.0) {
|
||||
if (cso->max_anisotropy >= 8) {
|
||||
ps->en |= NV34TCL_TX_ENABLE_ANISO_8X;
|
||||
} else
|
||||
if (cso->max_anisotropy >= 4.0) {
|
||||
if (cso->max_anisotropy >= 4) {
|
||||
ps->en |= NV34TCL_TX_ENABLE_ANISO_4X;
|
||||
} else
|
||||
if (cso->max_anisotropy >= 2.0) {
|
||||
if (cso->max_anisotropy >= 2) {
|
||||
ps->en |= NV34TCL_TX_ENABLE_ANISO_2X;
|
||||
}
|
||||
|
||||
|
|
@ -435,7 +435,7 @@ nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe,
|
|||
{
|
||||
struct nv30_context *nv30 = nv30_context(pipe);
|
||||
struct nv30_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso));
|
||||
struct nouveau_stateobj *so = so_new(5, 21, 0);
|
||||
struct nouveau_stateobj *so = so_new(6, 20, 0);
|
||||
struct nouveau_grobj *rankine = nv30->screen->rankine;
|
||||
|
||||
so_method(so, rankine, NV34TCL_DEPTH_FUNC, 3);
|
||||
|
|
@ -449,11 +449,11 @@ nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe,
|
|||
so_data (so, float_to_ubyte(cso->alpha.ref_value));
|
||||
|
||||
if (cso->stencil[0].enabled) {
|
||||
so_method(so, rankine, NV34TCL_STENCIL_FRONT_ENABLE, 8);
|
||||
so_method(so, rankine, NV34TCL_STENCIL_FRONT_ENABLE, 3);
|
||||
so_data (so, cso->stencil[0].enabled ? 1 : 0);
|
||||
so_data (so, cso->stencil[0].writemask);
|
||||
so_data (so, nvgl_comparison_op(cso->stencil[0].func));
|
||||
so_data (so, cso->stencil[0].ref_value);
|
||||
so_method(so, rankine, NV34TCL_STENCIL_FRONT_FUNC_MASK, 4);
|
||||
so_data (so, cso->stencil[0].valuemask);
|
||||
so_data (so, nvgl_stencil_op(cso->stencil[0].fail_op));
|
||||
so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
|
||||
|
|
@ -464,11 +464,11 @@ nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe,
|
|||
}
|
||||
|
||||
if (cso->stencil[1].enabled) {
|
||||
so_method(so, rankine, NV34TCL_STENCIL_BACK_ENABLE, 8);
|
||||
so_method(so, rankine, NV34TCL_STENCIL_BACK_ENABLE, 3);
|
||||
so_data (so, cso->stencil[1].enabled ? 1 : 0);
|
||||
so_data (so, cso->stencil[1].writemask);
|
||||
so_data (so, nvgl_comparison_op(cso->stencil[1].func));
|
||||
so_data (so, cso->stencil[1].ref_value);
|
||||
so_method(so, rankine, NV34TCL_STENCIL_BACK_FUNC_MASK, 4);
|
||||
so_data (so, cso->stencil[1].valuemask);
|
||||
so_data (so, nvgl_stencil_op(cso->stencil[1].fail_op));
|
||||
so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
|
||||
|
|
@ -582,6 +582,16 @@ nv30_set_blend_color(struct pipe_context *pipe,
|
|||
nv30->dirty |= NV30_NEW_BCOL;
|
||||
}
|
||||
|
||||
static void
|
||||
nv30_set_stencil_ref(struct pipe_context *pipe,
|
||||
const struct pipe_stencil_ref *sr)
|
||||
{
|
||||
struct nv30_context *nv30 = nv30_context(pipe);
|
||||
|
||||
nv30->stencil_ref = *sr;
|
||||
nv30->dirty |= NV30_NEW_SR;
|
||||
}
|
||||
|
||||
static void
|
||||
nv30_set_clip_state(struct pipe_context *pipe,
|
||||
const struct pipe_clip_state *clip)
|
||||
|
|
@ -704,6 +714,7 @@ nv30_init_state_functions(struct nv30_context *nv30)
|
|||
nv30->pipe.delete_fs_state = nv30_fp_state_delete;
|
||||
|
||||
nv30->pipe.set_blend_color = nv30_set_blend_color;
|
||||
nv30->pipe.set_stencil_ref = nv30_set_stencil_ref;
|
||||
nv30->pipe.set_clip_state = nv30_set_clip_state;
|
||||
nv30->pipe.set_constant_buffer = nv30_set_constant_buffer;
|
||||
nv30->pipe.set_framebuffer_state = nv30_set_framebuffer_state;
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ static struct nv30_state_entry *render_states[] = {
|
|||
&nv30_state_blend,
|
||||
&nv30_state_blend_colour,
|
||||
&nv30_state_zsa,
|
||||
&nv30_state_sr,
|
||||
&nv30_state_viewport,
|
||||
&nv30_state_vbo,
|
||||
NULL
|
||||
|
|
|
|||
|
|
@ -15,3 +15,27 @@ struct nv30_state_entry nv30_state_zsa = {
|
|||
.hw = NV30_STATE_ZSA
|
||||
}
|
||||
};
|
||||
|
||||
static boolean
|
||||
nv30_state_sr_validate(struct nv30_context *nv30)
|
||||
{
|
||||
struct nouveau_stateobj *so = so_new(2, 2, 0);
|
||||
struct pipe_stencil_ref *sr = &nv30->stencil_ref;
|
||||
|
||||
so_method(so, nv30->screen->rankine, NV34TCL_STENCIL_FRONT_FUNC_REF, 1);
|
||||
so_data (so, sr->ref_value[0]);
|
||||
so_method(so, nv30->screen->rankine, NV34TCL_STENCIL_BACK_FUNC_REF, 1);
|
||||
so_data (so, sr->ref_value[1]);
|
||||
|
||||
so_ref(so, &nv30->state.hw[NV30_STATE_SR]);
|
||||
so_ref(NULL, &so);
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
struct nv30_state_entry nv30_state_sr = {
|
||||
.validate = nv30_state_sr_validate,
|
||||
.dirty = {
|
||||
.pipe = NV30_NEW_SR,
|
||||
.hw = NV30_STATE_SR
|
||||
}
|
||||
};
|
||||
|
|
|
|||
|
|
@ -61,7 +61,8 @@ enum nv40_state_index {
|
|||
NV40_STATE_VTXBUF = 31,
|
||||
NV40_STATE_VTXFMT = 32,
|
||||
NV40_STATE_VTXATTR = 33,
|
||||
NV40_STATE_MAX = 34
|
||||
NV40_STATE_SR = 34,
|
||||
NV40_STATE_MAX = 35
|
||||
};
|
||||
|
||||
#include "nv40_screen.h"
|
||||
|
|
@ -79,6 +80,7 @@ enum nv40_state_index {
|
|||
#define NV40_NEW_FRAGPROG (1 << 10)
|
||||
#define NV40_NEW_ARRAYS (1 << 11)
|
||||
#define NV40_NEW_UCP (1 << 12)
|
||||
#define NV40_NEW_SR (1 << 13)
|
||||
|
||||
struct nv40_rasterizer_state {
|
||||
struct pipe_rasterizer_state pipe;
|
||||
|
|
@ -144,6 +146,7 @@ struct nv40_context {
|
|||
struct nv40_zsa_state *zsa;
|
||||
struct nv40_blend_state *blend;
|
||||
struct pipe_blend_color blend_colour;
|
||||
struct pipe_stencil_ref stencil_ref;
|
||||
struct pipe_viewport_state viewport;
|
||||
struct pipe_framebuffer_state framebuffer;
|
||||
struct pipe_buffer *idxbuf;
|
||||
|
|
@ -215,6 +218,7 @@ extern struct nv40_state_entry nv40_state_framebuffer;
|
|||
extern struct nv40_state_entry nv40_state_fragtex;
|
||||
extern struct nv40_state_entry nv40_state_vbo;
|
||||
extern struct nv40_state_entry nv40_state_vtxfmt;
|
||||
extern struct nv40_state_entry nv40_state_sr;
|
||||
|
||||
/* nv40_vbo.c */
|
||||
extern void nv40_draw_arrays(struct pipe_context *, unsigned mode,
|
||||
|
|
|
|||
|
|
@ -132,26 +132,26 @@ nv40_sampler_state_create(struct pipe_context *pipe,
|
|||
(wrap_mode(cso->wrap_r) << NV40TCL_TEX_WRAP_R_SHIFT));
|
||||
|
||||
ps->en = 0;
|
||||
if (cso->max_anisotropy >= 2.0) {
|
||||
if (cso->max_anisotropy >= 2) {
|
||||
/* no idea, binary driver sets it, works without it.. meh.. */
|
||||
ps->wrap |= (1 << 5);
|
||||
|
||||
if (cso->max_anisotropy >= 16.0) {
|
||||
if (cso->max_anisotropy >= 16) {
|
||||
ps->en |= NV40TCL_TEX_ENABLE_ANISO_16X;
|
||||
} else
|
||||
if (cso->max_anisotropy >= 12.0) {
|
||||
if (cso->max_anisotropy >= 12) {
|
||||
ps->en |= NV40TCL_TEX_ENABLE_ANISO_12X;
|
||||
} else
|
||||
if (cso->max_anisotropy >= 10.0) {
|
||||
if (cso->max_anisotropy >= 10) {
|
||||
ps->en |= NV40TCL_TEX_ENABLE_ANISO_10X;
|
||||
} else
|
||||
if (cso->max_anisotropy >= 8.0) {
|
||||
if (cso->max_anisotropy >= 8) {
|
||||
ps->en |= NV40TCL_TEX_ENABLE_ANISO_8X;
|
||||
} else
|
||||
if (cso->max_anisotropy >= 6.0) {
|
||||
if (cso->max_anisotropy >= 6) {
|
||||
ps->en |= NV40TCL_TEX_ENABLE_ANISO_6X;
|
||||
} else
|
||||
if (cso->max_anisotropy >= 4.0) {
|
||||
if (cso->max_anisotropy >= 4) {
|
||||
ps->en |= NV40TCL_TEX_ENABLE_ANISO_4X;
|
||||
} else {
|
||||
ps->en |= NV40TCL_TEX_ENABLE_ANISO_2X;
|
||||
|
|
@ -445,7 +445,7 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe,
|
|||
{
|
||||
struct nv40_context *nv40 = nv40_context(pipe);
|
||||
struct nv40_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso));
|
||||
struct nouveau_stateobj *so = so_new(4, 21, 0);
|
||||
struct nouveau_stateobj *so = so_new(6, 20, 0);
|
||||
struct nouveau_grobj *curie = nv40->screen->curie;
|
||||
|
||||
so_method(so, curie, NV40TCL_DEPTH_FUNC, 3);
|
||||
|
|
@ -459,11 +459,11 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe,
|
|||
so_data (so, float_to_ubyte(cso->alpha.ref_value));
|
||||
|
||||
if (cso->stencil[0].enabled) {
|
||||
so_method(so, curie, NV40TCL_STENCIL_FRONT_ENABLE, 8);
|
||||
so_method(so, curie, NV40TCL_STENCIL_FRONT_ENABLE, 3);
|
||||
so_data (so, cso->stencil[0].enabled ? 1 : 0);
|
||||
so_data (so, cso->stencil[0].writemask);
|
||||
so_data (so, nvgl_comparison_op(cso->stencil[0].func));
|
||||
so_data (so, cso->stencil[0].ref_value);
|
||||
so_method(so, curie, NV40TCL_STENCIL_FRONT_FUNC_MASK, 4);
|
||||
so_data (so, cso->stencil[0].valuemask);
|
||||
so_data (so, nvgl_stencil_op(cso->stencil[0].fail_op));
|
||||
so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
|
||||
|
|
@ -474,11 +474,11 @@ nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe,
|
|||
}
|
||||
|
||||
if (cso->stencil[1].enabled) {
|
||||
so_method(so, curie, NV40TCL_STENCIL_BACK_ENABLE, 8);
|
||||
so_method(so, curie, NV40TCL_STENCIL_BACK_ENABLE, 3);
|
||||
so_data (so, cso->stencil[1].enabled ? 1 : 0);
|
||||
so_data (so, cso->stencil[1].writemask);
|
||||
so_data (so, nvgl_comparison_op(cso->stencil[1].func));
|
||||
so_data (so, cso->stencil[1].ref_value);
|
||||
so_method(so, curie, NV40TCL_STENCIL_BACK_FUNC_MASK, 4);
|
||||
so_data (so, cso->stencil[1].valuemask);
|
||||
so_data (so, nvgl_stencil_op(cso->stencil[1].fail_op));
|
||||
so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
|
||||
|
|
@ -592,6 +592,16 @@ nv40_set_blend_color(struct pipe_context *pipe,
|
|||
nv40->dirty |= NV40_NEW_BCOL;
|
||||
}
|
||||
|
||||
static void
|
||||
nv40_set_stencil_ref(struct pipe_context *pipe,
|
||||
const struct pipe_stencil_ref *sr)
|
||||
{
|
||||
struct nv40_context *nv40 = nv40_context(pipe);
|
||||
|
||||
nv40->stencil_ref = *sr;
|
||||
nv40->dirty |= NV40_NEW_SR;
|
||||
}
|
||||
|
||||
static void
|
||||
nv40_set_clip_state(struct pipe_context *pipe,
|
||||
const struct pipe_clip_state *clip)
|
||||
|
|
@ -719,6 +729,7 @@ nv40_init_state_functions(struct nv40_context *nv40)
|
|||
nv40->pipe.delete_fs_state = nv40_fp_state_delete;
|
||||
|
||||
nv40->pipe.set_blend_color = nv40_set_blend_color;
|
||||
nv40->pipe.set_stencil_ref = nv40_set_stencil_ref;
|
||||
nv40->pipe.set_clip_state = nv40_set_clip_state;
|
||||
nv40->pipe.set_constant_buffer = nv40_set_constant_buffer;
|
||||
nv40->pipe.set_framebuffer_state = nv40_set_framebuffer_state;
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@ static struct nv40_state_entry *render_states[] = {
|
|||
&nv40_state_blend,
|
||||
&nv40_state_blend_colour,
|
||||
&nv40_state_zsa,
|
||||
&nv40_state_sr,
|
||||
&nv40_state_viewport,
|
||||
&nv40_state_vbo,
|
||||
NULL
|
||||
|
|
@ -29,6 +30,7 @@ static struct nv40_state_entry *swtnl_states[] = {
|
|||
&nv40_state_blend,
|
||||
&nv40_state_blend_colour,
|
||||
&nv40_state_zsa,
|
||||
&nv40_state_sr,
|
||||
&nv40_state_viewport,
|
||||
&nv40_state_vtxfmt,
|
||||
NULL
|
||||
|
|
|
|||
|
|
@ -15,3 +15,27 @@ struct nv40_state_entry nv40_state_zsa = {
|
|||
.hw = NV40_STATE_ZSA
|
||||
}
|
||||
};
|
||||
|
||||
static boolean
|
||||
nv40_state_sr_validate(struct nv40_context *nv40)
|
||||
{
|
||||
struct nouveau_stateobj *so = so_new(2, 2, 0);
|
||||
struct pipe_stencil_ref *sr = &nv40->stencil_ref;
|
||||
|
||||
so_method(so, nv40->screen->curie, NV40TCL_STENCIL_FRONT_FUNC_REF, 1);
|
||||
so_data (so, sr->ref_value[0]);
|
||||
so_method(so, nv40->screen->curie, NV40TCL_STENCIL_BACK_FUNC_REF, 1);
|
||||
so_data (so, sr->ref_value[1]);
|
||||
|
||||
so_ref(so, &nv40->state.hw[NV40_STATE_SR]);
|
||||
so_ref(NULL, &so);
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
struct nv40_state_entry nv40_state_sr = {
|
||||
.validate = nv40_state_sr_validate,
|
||||
.dirty = {
|
||||
.pipe = NV40_NEW_SR,
|
||||
.hw = NV40_STATE_SR
|
||||
}
|
||||
};
|
||||
|
|
|
|||
|
|
@ -50,6 +50,7 @@
|
|||
#define NV50_NEW_ARRAYS (1 << 14)
|
||||
#define NV50_NEW_SAMPLER (1 << 15)
|
||||
#define NV50_NEW_TEXTURE (1 << 16)
|
||||
#define NV50_NEW_STENCIL_REF (1 << 17)
|
||||
|
||||
struct nv50_blend_stateobj {
|
||||
struct pipe_blend_state pipe;
|
||||
|
|
@ -120,6 +121,7 @@ struct nv50_state {
|
|||
struct nouveau_stateobj *blend;
|
||||
struct nouveau_stateobj *blend_colour;
|
||||
struct nouveau_stateobj *zsa;
|
||||
struct nouveau_stateobj *stencil_ref;
|
||||
struct nouveau_stateobj *rast;
|
||||
struct nouveau_stateobj *stipple;
|
||||
struct nouveau_stateobj *scissor;
|
||||
|
|
@ -155,6 +157,7 @@ struct nv50_context {
|
|||
struct nv50_zsa_stateobj *zsa;
|
||||
struct nv50_rasterizer_stateobj *rasterizer;
|
||||
struct pipe_blend_color blend_colour;
|
||||
struct pipe_stencil_ref stencil_ref;
|
||||
struct pipe_poly_stipple stipple;
|
||||
struct pipe_scissor_state scissor;
|
||||
struct pipe_viewport_state viewport;
|
||||
|
|
|
|||
|
|
@ -202,18 +202,18 @@ nv50_sampler_state_create(struct pipe_context *pipe,
|
|||
break;
|
||||
}
|
||||
|
||||
if (cso->max_anisotropy >= 16.0)
|
||||
if (cso->max_anisotropy >= 16)
|
||||
tsc[0] |= (7 << 20);
|
||||
else
|
||||
if (cso->max_anisotropy >= 12.0)
|
||||
if (cso->max_anisotropy >= 12)
|
||||
tsc[0] |= (6 << 20);
|
||||
else {
|
||||
tsc[0] |= (int)(cso->max_anisotropy * 0.5f) << 20;
|
||||
tsc[0] |= (cso->max_anisotropy >> 1) << 20;
|
||||
|
||||
if (cso->max_anisotropy >= 4.0)
|
||||
if (cso->max_anisotropy >= 4)
|
||||
tsc[1] |= NV50TSC_1_1_UNKN_ANISO_35;
|
||||
else
|
||||
if (cso->max_anisotropy >= 2.0)
|
||||
if (cso->max_anisotropy >= 2)
|
||||
tsc[1] |= NV50TSC_1_1_UNKN_ANISO_15;
|
||||
}
|
||||
|
||||
|
|
@ -447,7 +447,7 @@ nv50_depth_stencil_alpha_state_create(struct pipe_context *pipe,
|
|||
{
|
||||
struct nouveau_grobj *tesla = nv50_context(pipe)->screen->tesla;
|
||||
struct nv50_zsa_stateobj *zsa = CALLOC_STRUCT(nv50_zsa_stateobj);
|
||||
struct nouveau_stateobj *so = so_new(8, 22, 0);
|
||||
struct nouveau_stateobj *so = so_new(9, 21, 0);
|
||||
|
||||
so_method(so, tesla, NV50TCL_DEPTH_WRITE_ENABLE, 1);
|
||||
so_data (so, cso->depth.writemask ? 1 : 0);
|
||||
|
|
@ -462,13 +462,13 @@ nv50_depth_stencil_alpha_state_create(struct pipe_context *pipe,
|
|||
}
|
||||
|
||||
if (cso->stencil[0].enabled) {
|
||||
so_method(so, tesla, NV50TCL_STENCIL_FRONT_ENABLE, 8);
|
||||
so_method(so, tesla, NV50TCL_STENCIL_FRONT_ENABLE, 5);
|
||||
so_data (so, 1);
|
||||
so_data (so, nvgl_stencil_op(cso->stencil[0].fail_op));
|
||||
so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
|
||||
so_data (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
|
||||
so_data (so, nvgl_comparison_op(cso->stencil[0].func));
|
||||
so_data (so, cso->stencil[0].ref_value);
|
||||
so_method(so, tesla, NV50TCL_STENCIL_FRONT_MASK, 2);
|
||||
so_data (so, cso->stencil[0].writemask);
|
||||
so_data (so, cso->stencil[0].valuemask);
|
||||
} else {
|
||||
|
|
@ -483,8 +483,7 @@ nv50_depth_stencil_alpha_state_create(struct pipe_context *pipe,
|
|||
so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
|
||||
so_data (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
|
||||
so_data (so, nvgl_comparison_op(cso->stencil[1].func));
|
||||
so_method(so, tesla, NV50TCL_STENCIL_BACK_FUNC_REF, 3);
|
||||
so_data (so, cso->stencil[1].ref_value);
|
||||
so_method(so, tesla, NV50TCL_STENCIL_BACK_MASK, 2);
|
||||
so_data (so, cso->stencil[1].writemask);
|
||||
so_data (so, cso->stencil[1].valuemask);
|
||||
} else {
|
||||
|
|
@ -633,6 +632,16 @@ nv50_set_blend_color(struct pipe_context *pipe,
|
|||
nv50->dirty |= NV50_NEW_BLEND_COLOUR;
|
||||
}
|
||||
|
||||
static void
|
||||
nv50_set_stencil_ref(struct pipe_context *pipe,
|
||||
const struct pipe_stencil_ref *sr)
|
||||
{
|
||||
struct nv50_context *nv50 = nv50_context(pipe);
|
||||
|
||||
nv50->stencil_ref = *sr;
|
||||
nv50->dirty |= NV50_NEW_STENCIL_REF;
|
||||
}
|
||||
|
||||
static void
|
||||
nv50_set_clip_state(struct pipe_context *pipe,
|
||||
const struct pipe_clip_state *clip)
|
||||
|
|
@ -761,6 +770,7 @@ nv50_init_state_functions(struct nv50_context *nv50)
|
|||
nv50->pipe.delete_gs_state = nv50_gp_state_delete;
|
||||
|
||||
nv50->pipe.set_blend_color = nv50_set_blend_color;
|
||||
nv50->pipe.set_stencil_ref = nv50_set_stencil_ref;
|
||||
nv50->pipe.set_clip_state = nv50_set_clip_state;
|
||||
nv50->pipe.set_constant_buffer = nv50_set_constant_buffer;
|
||||
nv50->pipe.set_framebuffer_state = nv50_set_framebuffer_state;
|
||||
|
|
|
|||
|
|
@ -205,6 +205,8 @@ nv50_state_emit(struct nv50_context *nv50)
|
|||
nv50->state.dirty |= NV50_NEW_RASTERIZER;
|
||||
if (nv50->state.blend_colour)
|
||||
nv50->state.dirty |= NV50_NEW_BLEND_COLOUR;
|
||||
if (nv50->state.stencil_ref)
|
||||
nv50->state.dirty |= NV50_NEW_STENCIL_REF;
|
||||
if (nv50->state.stipple)
|
||||
nv50->state.dirty |= NV50_NEW_STIPPLE;
|
||||
if (nv50->state.scissor)
|
||||
|
|
@ -242,6 +244,8 @@ nv50_state_emit(struct nv50_context *nv50)
|
|||
so_emit(chan, nv50->state.rast);
|
||||
if (nv50->state.dirty & NV50_NEW_BLEND_COLOUR)
|
||||
so_emit(chan, nv50->state.blend_colour);
|
||||
if (nv50->state.dirty & NV50_NEW_STENCIL_REF)
|
||||
so_emit(chan, nv50->state.stencil_ref);
|
||||
if (nv50->state.dirty & NV50_NEW_STIPPLE)
|
||||
so_emit(chan, nv50->state.stipple);
|
||||
if (nv50->state.dirty & NV50_NEW_SCISSOR)
|
||||
|
|
@ -325,6 +329,16 @@ nv50_state_validate(struct nv50_context *nv50)
|
|||
so_ref(NULL, &so);
|
||||
}
|
||||
|
||||
if (nv50->dirty & NV50_NEW_STENCIL_REF) {
|
||||
so = so_new(2, 2, 0);
|
||||
so_method(so, tesla, NV50TCL_STENCIL_FRONT_FUNC_REF, 1);
|
||||
so_data (so, nv50->stencil_ref.ref_value[0]);
|
||||
so_method(so, tesla, NV50TCL_STENCIL_BACK_FUNC_REF, 1);
|
||||
so_data (so, nv50->stencil_ref.ref_value[1]);
|
||||
so_ref(so, &nv50->state.stencil_ref);
|
||||
so_ref(NULL, &so);
|
||||
}
|
||||
|
||||
if (nv50->dirty & NV50_NEW_STIPPLE) {
|
||||
so = so_new(1, 32, 0);
|
||||
so_method(so, tesla, NV50TCL_POLYGON_STIPPLE_PATTERN(0), 32);
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@ static void r300_blitter_save_states(struct r300_context* r300)
|
|||
{
|
||||
util_blitter_save_blend(r300->blitter, r300->blend_state.state);
|
||||
util_blitter_save_depth_stencil_alpha(r300->blitter, r300->dsa_state.state);
|
||||
util_blitter_save_stencil_ref(r300->blitter, &(r300->stencil_ref));
|
||||
util_blitter_save_rasterizer(r300->blitter, r300->rs_state.state);
|
||||
util_blitter_save_fragment_shader(r300->blitter, r300->fs);
|
||||
util_blitter_save_vertex_shader(r300->blitter, r300->vs);
|
||||
|
|
|
|||
|
|
@ -318,6 +318,8 @@ struct r300_context {
|
|||
struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS];
|
||||
int vertex_element_count;
|
||||
|
||||
struct pipe_stencil_ref stencil_ref;
|
||||
|
||||
/* Bitmask of dirty state objects. */
|
||||
uint32_t dirty_state;
|
||||
/* Flag indicating whether or not the HW is dirty. */
|
||||
|
|
|
|||
|
|
@ -114,6 +114,7 @@ void r300_emit_dsa_state(struct r300_context* r300, void* state)
|
|||
struct r300_screen* r300screen = r300_screen(r300->context.screen);
|
||||
struct pipe_framebuffer_state* fb =
|
||||
(struct pipe_framebuffer_state*)r300->fb_state.state;
|
||||
struct pipe_stencil_ref stencil_ref = r300->stencil_ref;
|
||||
CS_LOCALS(r300);
|
||||
|
||||
BEGIN_CS(r300screen->caps->is_r500 ? 8 : 6);
|
||||
|
|
@ -128,10 +129,10 @@ void r300_emit_dsa_state(struct r300_context* r300, void* state)
|
|||
OUT_CS(0);
|
||||
}
|
||||
|
||||
OUT_CS(dsa->stencil_ref_mask);
|
||||
OUT_CS(dsa->stencil_ref_mask | stencil_ref.ref_value[0]);
|
||||
|
||||
if (r300screen->caps->is_r500) {
|
||||
OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf);
|
||||
OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf | stencil_ref.ref_value[1]);
|
||||
}
|
||||
END_CS;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -425,7 +425,7 @@ static void*
|
|||
(r300_translate_stencil_op(state->stencil[0].zfail_op) <<
|
||||
R300_S_FRONT_ZFAIL_OP_SHIFT);
|
||||
|
||||
dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
|
||||
dsa->stencil_ref_mask =
|
||||
(state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
|
||||
(state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
|
||||
|
||||
|
|
@ -444,7 +444,7 @@ static void*
|
|||
if (caps->is_r500)
|
||||
{
|
||||
dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
|
||||
dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
|
||||
dsa->stencil_ref_bf =
|
||||
(state->stencil[1].valuemask <<
|
||||
R300_STENCILMASK_SHIFT) |
|
||||
(state->stencil[1].writemask <<
|
||||
|
|
@ -488,6 +488,14 @@ static void r300_delete_dsa_state(struct pipe_context* pipe,
|
|||
FREE(state);
|
||||
}
|
||||
|
||||
static void r300_set_stencil_ref(struct pipe_context* pipe,
|
||||
const struct pipe_stencil_ref* sr)
|
||||
{
|
||||
struct r300_context* r300 = r300_context(pipe);
|
||||
r300->stencil_ref = *sr;
|
||||
r300->dsa_state.dirty = TRUE;
|
||||
}
|
||||
|
||||
static void
|
||||
r300_set_framebuffer_state(struct pipe_context* pipe,
|
||||
const struct pipe_framebuffer_state* state)
|
||||
|
|
@ -794,7 +802,7 @@ static void*
|
|||
sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
|
||||
state->mag_img_filter,
|
||||
state->min_mip_filter,
|
||||
state->max_anisotropy > 1.0);
|
||||
state->max_anisotropy > 0);
|
||||
|
||||
/* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
|
||||
/* We must pass these to the emit function to clamp them properly. */
|
||||
|
|
@ -1112,6 +1120,8 @@ void r300_init_state_functions(struct r300_context* r300)
|
|||
r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
|
||||
r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
|
||||
|
||||
r300->context.set_stencil_ref = r300_set_stencil_ref;
|
||||
|
||||
r300->context.set_framebuffer_state = r300_set_framebuffer_state;
|
||||
|
||||
r300->context.create_fs_state = r300_create_fs_state;
|
||||
|
|
|
|||
|
|
@ -312,15 +312,15 @@ static INLINE uint32_t r300_translate_tex_filters(int min, int mag, int mip,
|
|||
return retval;
|
||||
}
|
||||
|
||||
static INLINE uint32_t r300_anisotropy(float max_aniso)
|
||||
static INLINE uint32_t r300_anisotropy(unsigned max_aniso)
|
||||
{
|
||||
if (max_aniso >= 16.0f) {
|
||||
if (max_aniso >= 16) {
|
||||
return R300_TX_MAX_ANISO_16_TO_1;
|
||||
} else if (max_aniso >= 8.0f) {
|
||||
} else if (max_aniso >= 8) {
|
||||
return R300_TX_MAX_ANISO_8_TO_1;
|
||||
} else if (max_aniso >= 4.0f) {
|
||||
} else if (max_aniso >= 4) {
|
||||
return R300_TX_MAX_ANISO_4_TO_1;
|
||||
} else if (max_aniso >= 2.0f) {
|
||||
} else if (max_aniso >= 2) {
|
||||
return R300_TX_MAX_ANISO_2_TO_1;
|
||||
} else {
|
||||
return R300_TX_MAX_ANISO_1_TO_1;
|
||||
|
|
|
|||
|
|
@ -246,6 +246,7 @@ softpipe_create_context( struct pipe_screen *screen,
|
|||
softpipe->pipe.delete_gs_state = softpipe_delete_gs_state;
|
||||
|
||||
softpipe->pipe.set_blend_color = softpipe_set_blend_color;
|
||||
softpipe->pipe.set_stencil_ref = softpipe_set_stencil_ref;
|
||||
softpipe->pipe.set_clip_state = softpipe_set_clip_state;
|
||||
softpipe->pipe.set_constant_buffer = softpipe_set_constant_buffer;
|
||||
softpipe->pipe.set_framebuffer_state = softpipe_set_framebuffer_state;
|
||||
|
|
|
|||
|
|
@ -62,6 +62,7 @@ struct softpipe_context {
|
|||
|
||||
/** Other rendering state */
|
||||
struct pipe_blend_color blend_color;
|
||||
struct pipe_stencil_ref stencil_ref;
|
||||
struct pipe_clip_state clip;
|
||||
struct pipe_buffer *constants[PIPE_SHADER_TYPES][PIPE_MAX_CONSTANT_BUFFERS];
|
||||
struct pipe_framebuffer_state framebuffer;
|
||||
|
|
|
|||
|
|
@ -519,7 +519,7 @@ depth_stencil_test_quad(struct quad_stage *qs,
|
|||
failOp = softpipe->depth_stencil->stencil[face].fail_op;
|
||||
zFailOp = softpipe->depth_stencil->stencil[face].zfail_op;
|
||||
zPassOp = softpipe->depth_stencil->stencil[face].zpass_op;
|
||||
ref = softpipe->depth_stencil->stencil[face].ref_value;
|
||||
ref = softpipe->stencil_ref.ref_value[face];
|
||||
wrtMask = softpipe->depth_stencil->stencil[face].writemask;
|
||||
valMask = softpipe->depth_stencil->stencil[face].valuemask;
|
||||
|
||||
|
|
|
|||
|
|
@ -132,13 +132,16 @@ void softpipe_bind_rasterizer_state(struct pipe_context *, void *);
|
|||
void softpipe_delete_rasterizer_state(struct pipe_context *, void *);
|
||||
|
||||
void softpipe_set_framebuffer_state( struct pipe_context *,
|
||||
const struct pipe_framebuffer_state * );
|
||||
const struct pipe_framebuffer_state * );
|
||||
|
||||
void softpipe_set_blend_color( struct pipe_context *pipe,
|
||||
const struct pipe_blend_color *blend_color );
|
||||
|
||||
void softpipe_set_stencil_ref( struct pipe_context *pipe,
|
||||
const struct pipe_stencil_ref *stencil_ref );
|
||||
|
||||
void softpipe_set_clip_state( struct pipe_context *,
|
||||
const struct pipe_clip_state * );
|
||||
const struct pipe_clip_state * );
|
||||
|
||||
void softpipe_set_constant_buffer(struct pipe_context *,
|
||||
uint shader, uint index,
|
||||
|
|
|
|||
|
|
@ -61,7 +61,7 @@ void softpipe_delete_blend_state(struct pipe_context *pipe,
|
|||
|
||||
|
||||
void softpipe_set_blend_color( struct pipe_context *pipe,
|
||||
const struct pipe_blend_color *blend_color )
|
||||
const struct pipe_blend_color *blend_color )
|
||||
{
|
||||
struct softpipe_context *softpipe = softpipe_context(pipe);
|
||||
|
||||
|
|
@ -80,7 +80,7 @@ void softpipe_set_blend_color( struct pipe_context *pipe,
|
|||
|
||||
void *
|
||||
softpipe_create_depth_stencil_state(struct pipe_context *pipe,
|
||||
const struct pipe_depth_stencil_alpha_state *depth_stencil)
|
||||
const struct pipe_depth_stencil_alpha_state *depth_stencil)
|
||||
{
|
||||
return mem_dup(depth_stencil, sizeof(*depth_stencil));
|
||||
}
|
||||
|
|
@ -101,3 +101,13 @@ softpipe_delete_depth_stencil_state(struct pipe_context *pipe, void *depth)
|
|||
{
|
||||
FREE( depth );
|
||||
}
|
||||
|
||||
void softpipe_set_stencil_ref( struct pipe_context *pipe,
|
||||
const struct pipe_stencil_ref *stencil_ref )
|
||||
{
|
||||
struct softpipe_context *softpipe = softpipe_context(pipe);
|
||||
|
||||
softpipe->stencil_ref = *stencil_ref;
|
||||
|
||||
softpipe->dirty |= SP_NEW_DEPTH_STENCIL_ALPHA;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -209,7 +209,6 @@ init_pipe_state(struct sp_mpeg12_context *ctx)
|
|||
dsa.stencil[i].fail_op = PIPE_STENCIL_OP_KEEP;
|
||||
dsa.stencil[i].zpass_op = PIPE_STENCIL_OP_KEEP;
|
||||
dsa.stencil[i].zfail_op = PIPE_STENCIL_OP_KEEP;
|
||||
dsa.stencil[i].ref_value = 0;
|
||||
dsa.stencil[i].valuemask = 0;
|
||||
dsa.stencil[i].writemask = 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -116,7 +116,6 @@ struct svga_depth_stencil_state {
|
|||
/* SVGA3D has one ref/mask/writemask triple shared between front &
|
||||
* back face stencil. We really need two:
|
||||
*/
|
||||
unsigned stencil_ref:8;
|
||||
unsigned stencil_mask:8;
|
||||
unsigned stencil_writemask:8;
|
||||
|
||||
|
|
@ -199,6 +198,7 @@ struct svga_state
|
|||
struct pipe_poly_stipple poly_stipple;
|
||||
struct pipe_scissor_state scissor;
|
||||
struct pipe_blend_color blend_color;
|
||||
struct pipe_stencil_ref stencil_ref;
|
||||
struct pipe_clip_state clip;
|
||||
struct pipe_viewport_state viewport;
|
||||
|
||||
|
|
@ -376,6 +376,7 @@ struct svga_context
|
|||
#define SVGA_NEW_VS_RESULT 0x1000000
|
||||
#define SVGA_NEW_ZERO_STRIDE 0x2000000
|
||||
#define SVGA_NEW_TEXTURE_FLAGS 0x4000000
|
||||
#define SVGA_NEW_STENCIL_REF 0x8000000
|
||||
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -89,7 +89,6 @@ svga_create_depth_stencil_state(struct pipe_context *pipe,
|
|||
/* SVGA3D has one ref/mask/writemask triple shared between front &
|
||||
* back face stencil. We really need two:
|
||||
*/
|
||||
ds->stencil_ref = templ->stencil[0].ref_value & 0xff;
|
||||
ds->stencil_mask = templ->stencil[0].valuemask & 0xff;
|
||||
ds->stencil_writemask = templ->stencil[0].writemask & 0xff;
|
||||
}
|
||||
|
|
@ -102,7 +101,6 @@ svga_create_depth_stencil_state(struct pipe_context *pipe,
|
|||
ds->stencil[1].zfail = svga_translate_stencil_op(templ->stencil[1].zfail_op);
|
||||
ds->stencil[1].pass = svga_translate_stencil_op(templ->stencil[1].zpass_op);
|
||||
|
||||
ds->stencil_ref = templ->stencil[1].ref_value & 0xff;
|
||||
ds->stencil_mask = templ->stencil[1].valuemask & 0xff;
|
||||
ds->stencil_writemask = templ->stencil[1].writemask & 0xff;
|
||||
}
|
||||
|
|
@ -139,12 +137,24 @@ static void svga_delete_depth_stencil_state(struct pipe_context *pipe,
|
|||
}
|
||||
|
||||
|
||||
static void svga_set_stencil_ref( struct pipe_context *pipe,
|
||||
const struct pipe_stencil_ref *stencil_ref )
|
||||
{
|
||||
struct svga_context *svga = svga_context(pipe);
|
||||
|
||||
svga->curr.stencil_ref = *stencil_ref;
|
||||
|
||||
svga->dirty |= SVGA_NEW_STENCIL_REF;
|
||||
}
|
||||
|
||||
|
||||
void svga_init_depth_stencil_functions( struct svga_context *svga )
|
||||
{
|
||||
svga->pipe.create_depth_stencil_alpha_state = svga_create_depth_stencil_state;
|
||||
svga->pipe.bind_depth_stencil_alpha_state = svga_bind_depth_stencil_state;
|
||||
svga->pipe.delete_depth_stencil_alpha_state = svga_delete_depth_stencil_state;
|
||||
|
||||
svga->pipe.set_stencil_ref = svga_set_stencil_ref;
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -102,8 +102,8 @@ svga_create_sampler_state(struct pipe_context *pipe,
|
|||
cso->mipfilter = translate_mip_filter(sampler->min_mip_filter);
|
||||
cso->magfilter = translate_img_filter( sampler->mag_img_filter );
|
||||
cso->minfilter = translate_img_filter( sampler->min_img_filter );
|
||||
cso->aniso_level = MAX2( (unsigned) sampler->max_anisotropy, 1 );
|
||||
if(cso->aniso_level != 1)
|
||||
cso->aniso_level = MAX2( sampler->max_anisotropy, 1 );
|
||||
if(sampler->max_anisotropy)
|
||||
cso->magfilter = cso->minfilter = SVGA3D_TEX_FILTER_ANISOTROPIC;
|
||||
cso->lod_bias = sampler->lod_bias;
|
||||
cso->addressu = translate_wrap_mode(sampler->wrap_s);
|
||||
|
|
|
|||
|
|
@ -26,6 +26,9 @@
|
|||
#include "util/u_inlines.h"
|
||||
#include "pipe/p_defines.h"
|
||||
#include "util/u_math.h"
|
||||
#if 0
|
||||
#include "util/u_pack_color.h"
|
||||
#endif
|
||||
|
||||
#include "svga_context.h"
|
||||
#include "svga_state.h"
|
||||
|
|
@ -100,6 +103,23 @@ static int emit_rss( struct svga_context *svga,
|
|||
}
|
||||
}
|
||||
|
||||
#if 0
|
||||
/* FIXME: shouldn't we emit blend color here */
|
||||
if (dirty & SVGA_NEW_BLEND_COLOR) {
|
||||
union util_color uc;
|
||||
ubyte r = float_to_ubyte(svga->curr.blend_color.color[0]);
|
||||
ubyte g = float_to_ubyte(svga->curr.blend_color.color[1]);
|
||||
ubyte b = float_to_ubyte(svga->curr.blend_color.color[2]);
|
||||
ubyte a = float_to_ubyte(svga->curr.blend_color.color[3]);
|
||||
|
||||
util_pack_color_ub( r, g, b, a,
|
||||
PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
|
||||
|
||||
EMIT_RS( svga, uc.ui, BLENDCOLOR, fail );
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
if (dirty & (SVGA_NEW_DEPTH_STENCIL | SVGA_NEW_RAST)) {
|
||||
const struct svga_depth_stencil_state *curr = svga->curr.depth;
|
||||
|
|
@ -123,8 +143,7 @@ static int emit_rss( struct svga_context *svga,
|
|||
EMIT_RS( svga, curr->stencil[0].fail, STENCILFAIL, fail );
|
||||
EMIT_RS( svga, curr->stencil[0].zfail, STENCILZFAIL, fail );
|
||||
EMIT_RS( svga, curr->stencil[0].pass, STENCILPASS, fail );
|
||||
|
||||
EMIT_RS( svga, curr->stencil_ref, STENCILREF, fail );
|
||||
|
||||
EMIT_RS( svga, curr->stencil_mask, STENCILMASK, fail );
|
||||
EMIT_RS( svga, curr->stencil_writemask, STENCILWRITEMASK, fail );
|
||||
}
|
||||
|
|
@ -160,7 +179,6 @@ static int emit_rss( struct svga_context *svga,
|
|||
EMIT_RS( svga, curr->stencil[ccw].zfail, CCWSTENCILZFAIL, fail );
|
||||
EMIT_RS( svga, curr->stencil[ccw].pass, CCWSTENCILPASS, fail );
|
||||
|
||||
EMIT_RS( svga, curr->stencil_ref, STENCILREF, fail );
|
||||
EMIT_RS( svga, curr->stencil_mask, STENCILMASK, fail );
|
||||
EMIT_RS( svga, curr->stencil_writemask, STENCILWRITEMASK, fail );
|
||||
}
|
||||
|
|
@ -178,6 +196,9 @@ static int emit_rss( struct svga_context *svga,
|
|||
}
|
||||
}
|
||||
|
||||
if (dirty & SVGA_NEW_STENCIL_REF) {
|
||||
EMIT_RS( svga, svga->curr.stencil_ref.ref_value[0], STENCILREF, fail );
|
||||
}
|
||||
|
||||
if (dirty & SVGA_NEW_RAST)
|
||||
{
|
||||
|
|
@ -257,7 +278,11 @@ struct svga_tracked_state svga_hw_rss =
|
|||
"hw rss state",
|
||||
|
||||
(SVGA_NEW_BLEND |
|
||||
#if 0
|
||||
SVGA_NEW_BLEND_COLOR |
|
||||
#endif
|
||||
SVGA_NEW_DEPTH_STENCIL |
|
||||
SVGA_NEW_STENCIL_REF |
|
||||
SVGA_NEW_RAST |
|
||||
SVGA_NEW_FRAME_BUFFER |
|
||||
SVGA_NEW_NEED_PIPELINE),
|
||||
|
|
|
|||
|
|
@ -791,6 +791,24 @@ trace_context_set_blend_color(struct pipe_context *_pipe,
|
|||
}
|
||||
|
||||
|
||||
static INLINE void
|
||||
trace_context_set_stencil_ref(struct pipe_context *_pipe,
|
||||
const struct pipe_stencil_ref *state)
|
||||
{
|
||||
struct trace_context *tr_ctx = trace_context(_pipe);
|
||||
struct pipe_context *pipe = tr_ctx->pipe;
|
||||
|
||||
trace_dump_call_begin("pipe_context", "set_stencil_ref");
|
||||
|
||||
trace_dump_arg(ptr, pipe);
|
||||
trace_dump_arg(stencil_ref, state);
|
||||
|
||||
pipe->set_stencil_ref(pipe, state);
|
||||
|
||||
trace_dump_call_end();
|
||||
}
|
||||
|
||||
|
||||
static INLINE void
|
||||
trace_context_set_clip_state(struct pipe_context *_pipe,
|
||||
const struct pipe_clip_state *state)
|
||||
|
|
@ -1291,6 +1309,7 @@ trace_context_create(struct trace_screen *tr_scr,
|
|||
tr_ctx->base.bind_vs_state = trace_context_bind_vs_state;
|
||||
tr_ctx->base.delete_vs_state = trace_context_delete_vs_state;
|
||||
tr_ctx->base.set_blend_color = trace_context_set_blend_color;
|
||||
tr_ctx->base.set_stencil_ref = trace_context_set_stencil_ref;
|
||||
tr_ctx->base.set_clip_state = trace_context_set_clip_state;
|
||||
tr_ctx->base.set_constant_buffer = trace_context_set_constant_buffer;
|
||||
tr_ctx->base.set_framebuffer_state = trace_context_set_framebuffer_state;
|
||||
|
|
|
|||
|
|
@ -301,7 +301,6 @@ void trace_dump_depth_stencil_alpha_state(const struct pipe_depth_stencil_alpha_
|
|||
trace_dump_member(uint, &state->stencil[i], fail_op);
|
||||
trace_dump_member(uint, &state->stencil[i], zpass_op);
|
||||
trace_dump_member(uint, &state->stencil[i], zfail_op);
|
||||
trace_dump_member(uint, &state->stencil[i], ref_value);
|
||||
trace_dump_member(uint, &state->stencil[i], valuemask);
|
||||
trace_dump_member(uint, &state->stencil[i], writemask);
|
||||
trace_dump_struct_end();
|
||||
|
|
@ -381,6 +380,22 @@ void trace_dump_blend_color(const struct pipe_blend_color *state)
|
|||
trace_dump_struct_end();
|
||||
}
|
||||
|
||||
void trace_dump_stencil_ref(const struct pipe_stencil_ref *state)
|
||||
{
|
||||
if (!trace_dumping_enabled_locked())
|
||||
return;
|
||||
|
||||
if(!state) {
|
||||
trace_dump_null();
|
||||
return;
|
||||
}
|
||||
|
||||
trace_dump_struct_begin("pipe_stencil_ref");
|
||||
|
||||
trace_dump_member_array(uint, state, ref_value);
|
||||
|
||||
trace_dump_struct_end();
|
||||
}
|
||||
|
||||
void trace_dump_framebuffer_state(const struct pipe_framebuffer_state *state)
|
||||
{
|
||||
|
|
@ -420,11 +435,11 @@ void trace_dump_sampler_state(const struct pipe_sampler_state *state)
|
|||
trace_dump_member(uint, state, compare_mode);
|
||||
trace_dump_member(uint, state, compare_func);
|
||||
trace_dump_member(bool, state, normalized_coords);
|
||||
trace_dump_member(uint, state, max_anisotropy);
|
||||
trace_dump_member(float, state, lod_bias);
|
||||
trace_dump_member(float, state, min_lod);
|
||||
trace_dump_member(float, state, max_lod);
|
||||
trace_dump_member_array(float, state, border_color);
|
||||
trace_dump_member(float, state, max_anisotropy);
|
||||
|
||||
trace_dump_struct_end();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -59,6 +59,8 @@ void trace_dump_blend_state(const struct pipe_blend_state *state);
|
|||
|
||||
void trace_dump_blend_color(const struct pipe_blend_color *state);
|
||||
|
||||
void trace_dump_stencil_ref(const struct pipe_stencil_ref *state);
|
||||
|
||||
void trace_dump_framebuffer_state(const struct pipe_framebuffer_state *state);
|
||||
|
||||
void trace_dump_sampler_state(const struct pipe_sampler_state *state);
|
||||
|
|
|
|||
|
|
@ -186,8 +186,11 @@ struct pipe_context {
|
|||
void (*set_blend_color)( struct pipe_context *,
|
||||
const struct pipe_blend_color * );
|
||||
|
||||
void (*set_stencil_ref)( struct pipe_context *,
|
||||
const struct pipe_stencil_ref * );
|
||||
|
||||
void (*set_clip_state)( struct pipe_context *,
|
||||
const struct pipe_clip_state * );
|
||||
const struct pipe_clip_state * );
|
||||
|
||||
void (*set_constant_buffer)( struct pipe_context *,
|
||||
uint shader, uint index,
|
||||
|
|
|
|||
|
|
@ -199,9 +199,8 @@ struct pipe_stencil_state
|
|||
unsigned fail_op:3; /**< PIPE_STENCIL_OP_x */
|
||||
unsigned zpass_op:3; /**< PIPE_STENCIL_OP_x */
|
||||
unsigned zfail_op:3; /**< PIPE_STENCIL_OP_x */
|
||||
ubyte ref_value;
|
||||
ubyte valuemask;
|
||||
ubyte writemask;
|
||||
unsigned valuemask:8;
|
||||
unsigned writemask:8;
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -251,6 +250,10 @@ struct pipe_blend_color
|
|||
float color[4];
|
||||
};
|
||||
|
||||
struct pipe_stencil_ref
|
||||
{
|
||||
ubyte ref_value[2];
|
||||
};
|
||||
|
||||
struct pipe_framebuffer_state
|
||||
{
|
||||
|
|
@ -278,10 +281,10 @@ struct pipe_sampler_state
|
|||
unsigned compare_mode:1; /**< PIPE_TEX_COMPARE_x */
|
||||
unsigned compare_func:3; /**< PIPE_FUNC_x */
|
||||
unsigned normalized_coords:1; /**< Are coords normalized to [0,1]? */
|
||||
unsigned max_anisotropy:6;
|
||||
float lod_bias; /**< LOD/lambda bias */
|
||||
float min_lod, max_lod; /**< LOD clamp range, after bias */
|
||||
float border_color[4];
|
||||
float max_anisotropy;
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -130,11 +130,15 @@ struct st_context {
|
|||
/*
|
||||
* Parameter-like state (or properties)
|
||||
*/
|
||||
|
||||
|
||||
void set_blend_color(const struct pipe_blend_color *state ) {
|
||||
cso_set_blend_color($self->cso, state);
|
||||
}
|
||||
|
||||
void set_stencil_ref(const struct pipe_stencil_ref *state ) {
|
||||
cso_set_stencil_ref($self->cso, state);
|
||||
}
|
||||
|
||||
void set_clip(const struct pipe_clip_state *state ) {
|
||||
$self->pipe->set_clip_state($self->pipe, state);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -430,12 +430,15 @@ class Context(Object):
|
|||
|
||||
def delete_fs_state(self, state):
|
||||
pass
|
||||
|
||||
|
||||
delete_vs_state = delete_fs_state
|
||||
|
||||
|
||||
def set_blend_color(self, state):
|
||||
self.real.set_blend_color(state)
|
||||
|
||||
def set_stencil_ref(self, state):
|
||||
self.real.set_stencil_ref(state)
|
||||
|
||||
def set_clip_state(self, state):
|
||||
_state = gallium.Clip()
|
||||
_state.nr = state.nr
|
||||
|
|
|
|||
|
|
@ -307,6 +307,7 @@ static void draw_polygon(struct vg_context *ctx,
|
|||
void polygon_fill(struct polygon *poly, struct vg_context *ctx)
|
||||
{
|
||||
struct pipe_depth_stencil_alpha_state dsa;
|
||||
struct pipe_stencil_ref sr;
|
||||
struct pipe_blend_state blend;
|
||||
VGfloat bounds[4];
|
||||
VGfloat min_x, min_y, max_x, max_y;
|
||||
|
|
@ -325,6 +326,9 @@ void polygon_fill(struct polygon *poly, struct vg_context *ctx)
|
|||
set_blend_for_fill(&blend);
|
||||
|
||||
memset(&dsa, 0, sizeof(struct pipe_depth_stencil_alpha_state));
|
||||
memset(&sr, 0, sizeof(struct pipe_stencil_ref));
|
||||
/* only need a fixed 0. Rely on default or move it out at least? */
|
||||
cso_set_stencil_ref(ctx->cso_context, &sr);
|
||||
|
||||
cso_save_blend(ctx->cso_context);
|
||||
cso_save_depth_stencil_alpha(ctx->cso_context);
|
||||
|
|
@ -336,7 +340,6 @@ void polygon_fill(struct polygon *poly, struct vg_context *ctx)
|
|||
dsa.stencil[0].zfail_op = PIPE_STENCIL_OP_KEEP;
|
||||
dsa.stencil[0].zpass_op = PIPE_STENCIL_OP_INVERT;
|
||||
dsa.stencil[0].func = PIPE_FUNC_ALWAYS;
|
||||
dsa.stencil[0].ref_value = 0;
|
||||
dsa.stencil[0].valuemask = ~0;
|
||||
|
||||
cso_set_blend(ctx->cso_context, &blend);
|
||||
|
|
@ -352,7 +355,6 @@ void polygon_fill(struct polygon *poly, struct vg_context *ctx)
|
|||
dsa.stencil[0].zfail_op = PIPE_STENCIL_OP_KEEP;
|
||||
dsa.stencil[0].zpass_op = PIPE_STENCIL_OP_INCR_WRAP;
|
||||
dsa.stencil[0].func = PIPE_FUNC_ALWAYS;
|
||||
dsa.stencil[0].ref_value = 0;
|
||||
dsa.stencil[0].valuemask = ~0;
|
||||
|
||||
/* back */
|
||||
|
|
@ -362,7 +364,6 @@ void polygon_fill(struct polygon *poly, struct vg_context *ctx)
|
|||
dsa.stencil[1].zfail_op = PIPE_STENCIL_OP_KEEP;
|
||||
dsa.stencil[1].zpass_op = PIPE_STENCIL_OP_DECR_WRAP;
|
||||
dsa.stencil[1].func = PIPE_FUNC_ALWAYS;
|
||||
dsa.stencil[1].ref_value = 0;
|
||||
dsa.stencil[1].valuemask = ~0;
|
||||
|
||||
cso_set_blend(ctx->cso_context, &blend);
|
||||
|
|
@ -375,7 +376,6 @@ void polygon_fill(struct polygon *poly, struct vg_context *ctx)
|
|||
|
||||
cso_save_rasterizer(ctx->cso_context);
|
||||
dsa.stencil[0].func = PIPE_FUNC_ALWAYS;
|
||||
dsa.stencil[0].ref_value = 0;
|
||||
dsa.stencil[0].valuemask = ~0;
|
||||
|
||||
raster.cull_mode = raster.front_winding ^ PIPE_WINDING_BOTH;
|
||||
|
|
@ -407,7 +407,6 @@ void polygon_fill(struct polygon *poly, struct vg_context *ctx)
|
|||
dsa.stencil[0].fail_op = PIPE_STENCIL_OP_REPLACE;
|
||||
dsa.stencil[0].zfail_op = PIPE_STENCIL_OP_REPLACE;
|
||||
dsa.stencil[0].zpass_op = PIPE_STENCIL_OP_REPLACE;
|
||||
dsa.stencil[0].ref_value = 0;
|
||||
dsa.stencil[0].valuemask = dsa.stencil[0].writemask;
|
||||
dsa.stencil[1].enabled = 0;
|
||||
memcpy(&dsa.depth, &ctx->state.g3d.dsa.depth,
|
||||
|
|
@ -425,6 +424,7 @@ void polygon_array_fill(struct polygon_array *polyarray, struct vg_context *ctx)
|
|||
{
|
||||
struct array *polys = polyarray->array;
|
||||
struct pipe_depth_stencil_alpha_state dsa;
|
||||
struct pipe_stencil_ref sr;
|
||||
struct pipe_blend_state blend;
|
||||
VGfloat min_x = polyarray->min_x;
|
||||
VGfloat min_y = polyarray->min_y;
|
||||
|
|
@ -442,6 +442,9 @@ void polygon_array_fill(struct polygon_array *polyarray, struct vg_context *ctx)
|
|||
set_blend_for_fill(&blend);
|
||||
|
||||
memset(&dsa, 0, sizeof(struct pipe_depth_stencil_alpha_state));
|
||||
memset(&sr, 0, sizeof(struct pipe_stencil_ref));
|
||||
/* only need a fixed 0. Rely on default or move it out at least? */
|
||||
cso_set_stencil_ref(ctx->cso_context, &sr);
|
||||
|
||||
cso_save_blend(ctx->cso_context);
|
||||
cso_save_depth_stencil_alpha(ctx->cso_context);
|
||||
|
|
@ -453,7 +456,6 @@ void polygon_array_fill(struct polygon_array *polyarray, struct vg_context *ctx)
|
|||
dsa.stencil[0].zfail_op = PIPE_STENCIL_OP_KEEP;
|
||||
dsa.stencil[0].zpass_op = PIPE_STENCIL_OP_INVERT;
|
||||
dsa.stencil[0].func = PIPE_FUNC_ALWAYS;
|
||||
dsa.stencil[0].ref_value = 0;
|
||||
dsa.stencil[0].valuemask = ~0;
|
||||
|
||||
cso_set_blend(ctx->cso_context, &blend);
|
||||
|
|
@ -472,7 +474,6 @@ void polygon_array_fill(struct polygon_array *polyarray, struct vg_context *ctx)
|
|||
dsa.stencil[0].zfail_op = PIPE_STENCIL_OP_KEEP;
|
||||
dsa.stencil[0].zpass_op = PIPE_STENCIL_OP_INCR_WRAP;
|
||||
dsa.stencil[0].func = PIPE_FUNC_ALWAYS;
|
||||
dsa.stencil[0].ref_value = 0;
|
||||
dsa.stencil[0].valuemask = ~0;
|
||||
|
||||
/* back */
|
||||
|
|
@ -482,7 +483,6 @@ void polygon_array_fill(struct polygon_array *polyarray, struct vg_context *ctx)
|
|||
dsa.stencil[1].zfail_op = PIPE_STENCIL_OP_KEEP;
|
||||
dsa.stencil[1].zpass_op = PIPE_STENCIL_OP_DECR_WRAP;
|
||||
dsa.stencil[1].func = PIPE_FUNC_ALWAYS;
|
||||
dsa.stencil[1].ref_value = 0;
|
||||
dsa.stencil[1].valuemask = ~0;
|
||||
|
||||
cso_set_blend(ctx->cso_context, &blend);
|
||||
|
|
@ -498,7 +498,6 @@ void polygon_array_fill(struct polygon_array *polyarray, struct vg_context *ctx)
|
|||
|
||||
cso_save_rasterizer(ctx->cso_context);
|
||||
dsa.stencil[0].func = PIPE_FUNC_ALWAYS;
|
||||
dsa.stencil[0].ref_value = 0;
|
||||
dsa.stencil[0].valuemask = ~0;
|
||||
|
||||
raster.cull_mode = raster.front_winding ^ PIPE_WINDING_BOTH;
|
||||
|
|
@ -536,7 +535,6 @@ void polygon_array_fill(struct polygon_array *polyarray, struct vg_context *ctx)
|
|||
dsa.stencil[0].fail_op = PIPE_STENCIL_OP_REPLACE;
|
||||
dsa.stencil[0].zfail_op = PIPE_STENCIL_OP_REPLACE;
|
||||
dsa.stencil[0].zpass_op = PIPE_STENCIL_OP_REPLACE;
|
||||
dsa.stencil[0].ref_value = 0;
|
||||
dsa.stencil[0].valuemask = dsa.stencil[0].writemask;
|
||||
dsa.stencil[1].enabled = 0;
|
||||
memcpy(&dsa.depth, &ctx->state.g3d.dsa.depth,
|
||||
|
|
|
|||
|
|
@ -94,9 +94,11 @@ static void
|
|||
update_depth_stencil_alpha(struct st_context *st)
|
||||
{
|
||||
struct pipe_depth_stencil_alpha_state *dsa = &st->state.depth_stencil;
|
||||
struct pipe_stencil_ref sr;
|
||||
GLcontext *ctx = st->ctx;
|
||||
|
||||
memset(dsa, 0, sizeof(*dsa));
|
||||
memset(&sr, 0, sizeof(sr));
|
||||
|
||||
if (ctx->Depth.Test && ctx->DrawBuffer->Visual.depthBits > 0) {
|
||||
dsa->depth.enabled = 1;
|
||||
|
|
@ -110,9 +112,9 @@ update_depth_stencil_alpha(struct st_context *st)
|
|||
dsa->stencil[0].fail_op = gl_stencil_op_to_pipe(ctx->Stencil.FailFunc[0]);
|
||||
dsa->stencil[0].zfail_op = gl_stencil_op_to_pipe(ctx->Stencil.ZFailFunc[0]);
|
||||
dsa->stencil[0].zpass_op = gl_stencil_op_to_pipe(ctx->Stencil.ZPassFunc[0]);
|
||||
dsa->stencil[0].ref_value = ctx->Stencil.Ref[0] & 0xff;
|
||||
dsa->stencil[0].valuemask = ctx->Stencil.ValueMask[0] & 0xff;
|
||||
dsa->stencil[0].writemask = ctx->Stencil.WriteMask[0] & 0xff;
|
||||
sr.ref_value[0] = ctx->Stencil.Ref[0] & 0xff;
|
||||
|
||||
if (ctx->Stencil._TestTwoSide) {
|
||||
const GLuint back = ctx->Stencil._BackFace;
|
||||
|
|
@ -121,13 +123,17 @@ update_depth_stencil_alpha(struct st_context *st)
|
|||
dsa->stencil[1].fail_op = gl_stencil_op_to_pipe(ctx->Stencil.FailFunc[back]);
|
||||
dsa->stencil[1].zfail_op = gl_stencil_op_to_pipe(ctx->Stencil.ZFailFunc[back]);
|
||||
dsa->stencil[1].zpass_op = gl_stencil_op_to_pipe(ctx->Stencil.ZPassFunc[back]);
|
||||
dsa->stencil[1].ref_value = ctx->Stencil.Ref[back] & 0xff;
|
||||
dsa->stencil[1].valuemask = ctx->Stencil.ValueMask[back] & 0xff;
|
||||
dsa->stencil[1].writemask = ctx->Stencil.WriteMask[back] & 0xff;
|
||||
sr.ref_value[1] = ctx->Stencil.Ref[back] & 0xff;
|
||||
}
|
||||
else {
|
||||
/* This should be unnecessary. Drivers must not expect this to
|
||||
* contain valid data, except the enabled bit
|
||||
*/
|
||||
dsa->stencil[1] = dsa->stencil[0];
|
||||
dsa->stencil[1].enabled = 0;
|
||||
sr.ref_value[1] = sr.ref_value[0];
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -138,6 +144,7 @@ update_depth_stencil_alpha(struct st_context *st)
|
|||
}
|
||||
|
||||
cso_set_depth_stencil_alpha(st->cso_context, dsa);
|
||||
cso_set_stencil_ref(st->cso_context, &sr);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -211,7 +211,7 @@ update_samplers(struct st_context *st)
|
|||
teximg ? teximg->_BaseFormat : GL_RGBA,
|
||||
sampler->border_color);
|
||||
|
||||
sampler->max_anisotropy = texobj->MaxAnisotropy;
|
||||
sampler->max_anisotropy = (texobj->MaxAnisotropy == 1.0 ? 0 : (GLuint)texobj->MaxAnisotropy);
|
||||
|
||||
/* only care about ARB_shadow, not SGI shadow */
|
||||
if (texobj->CompareMode == GL_COMPARE_R_TO_TEXTURE) {
|
||||
|
|
|
|||
|
|
@ -215,6 +215,7 @@ clear_with_quad(GLcontext *ctx,
|
|||
*/
|
||||
|
||||
cso_save_blend(st->cso_context);
|
||||
cso_save_stencil_ref(st->cso_context);
|
||||
cso_save_depth_stencil_alpha(st->cso_context);
|
||||
cso_save_rasterizer(st->cso_context);
|
||||
cso_save_fragment_shader(st->cso_context);
|
||||
|
|
@ -254,14 +255,17 @@ clear_with_quad(GLcontext *ctx,
|
|||
}
|
||||
|
||||
if (stencil) {
|
||||
struct pipe_stencil_ref stencil_ref;
|
||||
memset(&stencil_ref, 0, sizeof(stencil_ref));
|
||||
depth_stencil.stencil[0].enabled = 1;
|
||||
depth_stencil.stencil[0].func = PIPE_FUNC_ALWAYS;
|
||||
depth_stencil.stencil[0].fail_op = PIPE_STENCIL_OP_REPLACE;
|
||||
depth_stencil.stencil[0].zpass_op = PIPE_STENCIL_OP_REPLACE;
|
||||
depth_stencil.stencil[0].zfail_op = PIPE_STENCIL_OP_REPLACE;
|
||||
depth_stencil.stencil[0].ref_value = ctx->Stencil.Clear;
|
||||
depth_stencil.stencil[0].valuemask = 0xff;
|
||||
depth_stencil.stencil[0].writemask = ctx->Stencil.WriteMask[0] & 0xff;
|
||||
stencil_ref.ref_value[0] = ctx->Stencil.Clear;
|
||||
cso_set_stencil_ref(st->cso_context, &stencil_ref);
|
||||
}
|
||||
|
||||
cso_set_depth_stencil_alpha(st->cso_context, &depth_stencil);
|
||||
|
|
@ -277,10 +281,12 @@ clear_with_quad(GLcontext *ctx,
|
|||
|
||||
/* Restore pipe state */
|
||||
cso_restore_blend(st->cso_context);
|
||||
cso_restore_stencil_ref(st->cso_context);
|
||||
cso_restore_depth_stencil_alpha(st->cso_context);
|
||||
cso_restore_rasterizer(st->cso_context);
|
||||
cso_restore_fragment_shader(st->cso_context);
|
||||
cso_restore_vertex_shader(st->cso_context);
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue