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radeonsi: enable vcn encoder rgb input support
v2: use luma pitch when chroma not available (Ruijing) Signed-off-by: Thong Thai <thong.thai@amd.com> Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24151>
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043dcfad04
commit
64eab1f3ae
4 changed files with 43 additions and 9 deletions
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@ -223,18 +223,36 @@ static void radeon_vcn_enc_get_input_format_param(struct radeon_encoder *enc,
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case PIPE_FORMAT_P010:
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enc->enc_pic.enc_input_format.input_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_10_BIT;
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enc->enc_pic.enc_input_format.input_color_packing_format = RENCODE_COLOR_PACKING_FORMAT_P010;
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enc->enc_pic.enc_input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_2_0;
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enc->enc_pic.enc_input_format.input_color_space = RENCODE_COLOR_SPACE_YUV;
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break;
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case PIPE_FORMAT_B8G8R8A8_UNORM:
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case PIPE_FORMAT_B8G8R8X8_UNORM:
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enc->enc_pic.enc_input_format.input_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_8_BIT;
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enc->enc_pic.enc_input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_4_4;
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enc->enc_pic.enc_input_format.input_color_packing_format = RENCODE_COLOR_PACKING_FORMAT_A8R8G8B8;
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enc->enc_pic.enc_input_format.input_color_space = RENCODE_COLOR_SPACE_RGB;
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break;
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break;
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case PIPE_FORMAT_R8G8B8A8_UNORM:
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case PIPE_FORMAT_R8G8B8X8_UNORM:
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enc->enc_pic.enc_input_format.input_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_8_BIT;
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enc->enc_pic.enc_input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_4_4;
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enc->enc_pic.enc_input_format.input_color_packing_format = RENCODE_COLOR_PACKING_FORMAT_A8B8G8R8;
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enc->enc_pic.enc_input_format.input_color_space = RENCODE_COLOR_SPACE_RGB;
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break;
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case PIPE_FORMAT_NV12: /* FALL THROUGH */
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default:
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enc->enc_pic.enc_input_format.input_color_bit_depth = RENCODE_COLOR_BIT_DEPTH_8_BIT;
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enc->enc_pic.enc_input_format.input_color_packing_format = RENCODE_COLOR_PACKING_FORMAT_NV12;
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enc->enc_pic.enc_input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_2_0;
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enc->enc_pic.enc_input_format.input_color_space = RENCODE_COLOR_SPACE_YUV;
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break;
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}
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enc->enc_pic.enc_input_format.input_color_volume = RENCODE_COLOR_VOLUME_G22_BT709;
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enc->enc_pic.enc_input_format.input_color_range = RENCODE_COLOR_RANGE_FULL;
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enc->enc_pic.enc_input_format.input_chroma_subsampling = RENCODE_CHROMA_SUBSAMPLING_4_2_0;
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enc->enc_pic.enc_input_format.input_color_volume = RENCODE_COLOR_VOLUME_G22_BT709;
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enc->enc_pic.enc_input_format.input_color_range = RENCODE_COLOR_RANGE_FULL;
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enc->enc_pic.enc_input_format.input_chroma_location = RENCODE_CHROMA_LOCATION_INTERSTITIAL;
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enc->enc_pic.enc_input_format.input_color_space = RENCODE_COLOR_SPACE_YUV;
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}
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static void radeon_vcn_enc_h264_get_param(struct radeon_encoder *enc,
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@ -817,8 +835,16 @@ static void radeon_enc_begin_frame(struct pipe_video_codec *encoder,
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}
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}
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enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
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enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
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if (source->buffer_format == PIPE_FORMAT_NV12 ||
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source->buffer_format == PIPE_FORMAT_P010 ||
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source->buffer_format == PIPE_FORMAT_P016) {
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enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
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enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma);
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}
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else {
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enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma);
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enc->chroma = NULL;
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}
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enc->need_feedback = false;
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@ -171,11 +171,15 @@
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#define RENCODE_COLOR_BIT_DEPTH_10_BIT 1
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#define RENCODE_CHROMA_SUBSAMPLING_4_2_0 0
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#define RENCODE_CHROMA_SUBSAMPLING_4_4_4 1
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#define RENCODE_COLOR_PACKING_FORMAT_NV12 0
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#define RENCODE_COLOR_PACKING_FORMAT_P010 1
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#define RENCODE_COLOR_PACKING_FORMAT_A8R8G8B8 4
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#define RENCODE_COLOR_PACKING_FORMAT_A8B8G8R8 7
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#define RENCODE_COLOR_SPACE_YUV 0
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#define RENCODE_COLOR_SPACE_RGB 1
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#define PIPE_ALIGN_IN_BLOCK_SIZE(value, alignment) DIV_ROUND_UP(value, alignment)
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@ -1195,14 +1195,16 @@ static void radeon_enc_encode_params(struct radeon_encoder *enc)
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enc->enc_pic.enc_params.allowed_max_bitstream_size = enc->bs_size;
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enc->enc_pic.enc_params.input_pic_luma_pitch = enc->luma->u.gfx9.surf_pitch;
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enc->enc_pic.enc_params.input_pic_chroma_pitch = enc->chroma->u.gfx9.surf_pitch;
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enc->enc_pic.enc_params.input_pic_chroma_pitch = enc->chroma ?
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enc->chroma->u.gfx9.surf_pitch : enc->luma->u.gfx9.surf_pitch;
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enc->enc_pic.enc_params.input_pic_swizzle_mode = enc->luma->u.gfx9.swizzle_mode;
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RADEON_ENC_BEGIN(enc->cmd.enc_params);
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RADEON_ENC_CS(enc->enc_pic.enc_params.pic_type);
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RADEON_ENC_CS(enc->enc_pic.enc_params.allowed_max_bitstream_size);
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RADEON_ENC_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->luma->u.gfx9.surf_offset);
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RADEON_ENC_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->chroma->u.gfx9.surf_offset);
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RADEON_ENC_READ(enc->handle, RADEON_DOMAIN_VRAM, enc->chroma ?
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enc->chroma->u.gfx9.surf_offset : enc->luma->u.gfx9.surf_pitch);
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RADEON_ENC_CS(enc->enc_pic.enc_params.input_pic_luma_pitch);
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RADEON_ENC_CS(enc->enc_pic.enc_params.input_pic_chroma_pitch);
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RADEON_ENC_CS(enc->enc_pic.enc_params.input_pic_swizzle_mode);
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@ -748,7 +748,9 @@ static int si_get_video_param(struct pipe_screen *screen, enum pipe_video_profil
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return 1;
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else
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return 0;
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case PIPE_VIDEO_CAP_EFC_SUPPORTED:
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return ((sscreen->info.family >= CHIP_RENOIR) &&
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!(sscreen->debug_flags & DBG(NO_EFC)));
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default:
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return 0;
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}
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