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aco: mask bits source of s_bfe

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The s_bfe instructions use 7 bits, not 5 like the NIR opcode requires.

No fossil-db changes (navi21).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9162
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23464>
(cherry picked from commit 08064a5542)
This commit is contained in:
Rhys Perry 2023-06-06 10:55:16 +01:00 • committed by Eric Engestrom
parent 20a8a29ffc
commit 64b70bd6d0
2 changed files with 13 additions and 6 deletions
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2
.pick_status.json
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@ -3433,7 +3433,7 @@
"description": "aco: mask bits source of s_bfe",
"nominated": true,
"nomination_type": 0,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": null
},

17
src/amd/compiler/aco_instruction_selection.cpp
View file

@ -3722,15 +3722,19 @@ visit_alu_instr(isel_context* ctx, nir_alu_instr* instr)
aco_opcode opcode =
instr->op == nir_op_ubfe ? aco_opcode::s_bfe_u32 : aco_opcode::s_bfe_i32;
if (const_offset && const_bits) {
uint32_t extract = (const_bits->u32 << 16) | (const_offset->u32 & 0x1f);
uint32_t extract = ((const_bits->u32 & 0x1f) << 16) | (const_offset->u32 & 0x1f);
bld.sop2(opcode, Definition(dst), bld.def(s1, scc), base, Operand::c32(extract));
break;
}
Temp offset = get_alu_src(ctx, instr->src[1]);
Temp bits = get_alu_src(ctx, instr->src[2]);
if (ctx->program->gfx_level >= GFX9) {
Temp extract = bld.sop2(aco_opcode::s_pack_ll_b32_b16, bld.def(s1), offset, bits);
Operand bits_op = const_bits ? Operand::c32(const_bits->u32 & 0x1f)
: bld.sop2(aco_opcode::s_and_b32, bld.def(s1),
bld.def(s1, scc), bits, Operand::c32(0x1fu));
Temp extract = bld.sop2(aco_opcode::s_pack_ll_b32_b16, bld.def(s1), offset, bits_op);
bld.sop2(opcode, Definition(dst), bld.def(s1, scc), base, extract);
} else if (instr->op == nir_op_ubfe) {
Temp mask = bld.sop2(aco_opcode::s_bfm_b32, bld.def(s1), bits, offset);
@ -3738,9 +3742,12 @@ visit_alu_instr(isel_context* ctx, nir_alu_instr* instr)
bld.sop2(aco_opcode::s_and_b32, bld.def(s1), bld.def(s1, scc), base, mask);
bld.sop2(aco_opcode::s_lshr_b32, Definition(dst), bld.def(s1, scc), masked, offset);
} else {
Operand bits_op = const_bits ? Operand::c32(const_bits->u32 << 16)
: bld.sop2(aco_opcode::s_lshl_b32, bld.def(s1),
bld.def(s1, scc), bits, Operand::c32(16u));
Operand bits_op = const_bits
? Operand::c32((const_bits->u32 & 0x1f) << 16)
: bld.sop2(aco_opcode::s_lshl_b32, bld.def(s1), bld.def(s1, scc),
bld.sop2(aco_opcode::s_and_b32, bld.def(s1),
bld.def(s1, scc), bits, Operand::c32(0x1fu)),
Operand::c32(16u));
Operand offset_op = const_offset
? Operand::c32(const_offset->u32 & 0x1fu)
: bld.sop2(aco_opcode::s_and_b32, bld.def(s1), bld.def(s1, scc),