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nvir: Always split 64-bit IMAD/IMUL operations

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Those operations do not map to actual hardware instructions, therefore
those should always be lowered to 32-bit instructions.

Fixes: 009c54aa7a "nv50/ir: Split 64-bit integer MAD/MUL operations"

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
(cherry picked from commit 21b92b3464)
Conflicts resolved by Dylan

Conflicts:
	src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
This commit is contained in:
Pierre Moreau 2017-12-05 00:51:04 +01:00 • committed by Dylan Baker
parent cf54d5f47c
commit 649aff1a87
1 changed files with 1 additions and 1 deletions
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src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
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@ -3797,7 +3797,7 @@ Program::optimizeSSA(int level)
RUN_PASS(2, AlgebraicOpt, run);
RUN_PASS(2, ModifierFolding, run); // before load propagation -> less checks
RUN_PASS(1, ConstantFolding, foldAll);
RUN_PASS(1, Split64BitOpPreRA, run);
RUN_PASS(0, Split64BitOpPreRA, run);
RUN_PASS(1, LoadPropagation, run);
RUN_PASS(1, IndirectPropagation, run);
RUN_PASS(2, MemoryOpt, run);