radeonsi: add si_emit_buffered_gfx_sh_regs_for_mesh

For mesh shader support.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37932>
This commit is contained in:
Qiang Yu 2025-05-26 15:44:06 +08:00 committed by Marge Bot
parent 04912c585c
commit 644061fdbc
2 changed files with 15 additions and 0 deletions

View file

@ -695,6 +695,7 @@ void si_set_vertex_buffer_descriptor(struct si_screen *sscreen, struct si_vertex
const struct pipe_vertex_buffer *vb, unsigned element_index,
uint32_t *out);
void si_emit_buffered_compute_sh_regs(struct si_context *sctx);
void si_emit_buffered_gfx_sh_regs_for_mesh(struct si_context *sctx);
void si_init_draw_functions_GFX6(struct si_context *sctx);
void si_init_draw_functions_GFX7(struct si_context *sctx);
void si_init_draw_functions_GFX8(struct si_context *sctx);

View file

@ -1274,6 +1274,20 @@ void si_emit_buffered_compute_sh_regs(struct si_context *sctx)
}
}
/* Used by mesh pipeline only. */
void si_emit_buffered_gfx_sh_regs_for_mesh(struct si_context *sctx)
{
if (sctx->gfx_level >= GFX12) {
radeon_begin(&sctx->gfx_cs);
gfx12_emit_buffered_sh_regs_inline(&sctx->num_buffered_gfx_sh_regs,
sctx->gfx12.buffered_gfx_sh_regs);
radeon_end();
} else {
gfx11_emit_buffered_sh_regs_inline(sctx, &sctx->num_buffered_gfx_sh_regs,
sctx->gfx11.buffered_gfx_sh_regs);
}
}
#endif
template <amd_gfx_level GFX_VERSION, si_has_tess HAS_TESS, si_has_gs HAS_GS, si_has_ngg NGG,