diff --git a/.pick_status.json b/.pick_status.json index 435830a0a0e..0076b740dcb 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -3234,7 +3234,7 @@ "description": "radeonsi: recompute IO bases after optimizations", "nominated": true, "nomination_type": 2, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "d06616063cabda3443f52323e33a890e8f48f6f4", "notes": null diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c index b1e92028e78..d2f7f82ac94 100644 --- a/src/gallium/drivers/radeonsi/si_shader_nir.c +++ b/src/gallium/drivers/radeonsi/si_shader_nir.c @@ -111,6 +111,7 @@ void si_finalize_nir(struct pipe_screen *screen, struct nir_shader *nir, bool optimize) { struct si_screen *sscreen = (struct si_screen *)screen; + nir_variable_mode recompute_io_bases = 0; if (nir->info.io_lowered) { nir_foreach_variable_with_modes(var, nir, nir_var_shader_in | nir_var_shader_out) { @@ -119,7 +120,7 @@ void si_finalize_nir(struct pipe_screen *screen, struct nir_shader *nir, /* Not all places recompute FS input bases, but we need them to be up to date. */ if (nir->info.stage == MESA_SHADER_FRAGMENT) - NIR_PASS(_, nir, nir_recompute_io_bases, nir_var_shader_in | nir_var_shader_out); + recompute_io_bases = nir_var_shader_in | nir_var_shader_out; } else { /* This always recomputes FS output bases. */ nir_lower_io_passes(nir, false); @@ -146,6 +147,9 @@ void si_finalize_nir(struct pipe_screen *screen, struct nir_shader *nir, NIR_PASS_ASSERT_NO_PROGRESS(nir, nir_opt_intrinsics); NIR_PASS_ASSERT_NO_PROGRESS(nir, nir_lower_system_values); + if (recompute_io_bases) + NIR_PASS(_, nir, nir_recompute_io_bases, recompute_io_bases); + /* Remove uniforms because those should have been lowered to UBOs already. */ nir_foreach_variable_with_modes_safe(var, nir, nir_var_uniform) { if (!glsl_type_get_image_count(var->type) &&