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radeonsi: fix Gather4 with integer formats
The closed compiler does the same thing. This fixes: GL45-CTS.texture_gather.*-int-* (18 tests) Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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3e756f09d4
commit
63da0c991d
1 changed files with 96 additions and 3 deletions
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@ -4724,16 +4724,86 @@ static void tex_fetch_args(
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samp_ptr, address, count, dmask);
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}
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/* Gather4 should follow the same rules as bilinear filtering, but the hardware
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* incorrectly forces nearest filtering if the texture format is integer.
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* The only effect it has on Gather4, which always returns 4 texels for
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* bilinear filtering, is that the final coordinates are off by 0.5 of
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* the texel size.
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*
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* The workaround is to subtract 0.5 from the unnormalized coordinates,
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* or (0.5 / size) from the normalized coordinates.
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*/
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static void si_lower_gather4_integer(struct si_shader_context *ctx,
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struct lp_build_emit_data *emit_data,
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const char *intr_name,
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unsigned coord_vgpr_index)
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{
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LLVMBuilderRef builder = ctx->radeon_bld.gallivm.builder;
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LLVMValueRef coord = emit_data->args[0];
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LLVMValueRef half_texel[2];
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int c;
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if (emit_data->inst->Texture.Texture == TGSI_TEXTURE_RECT ||
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emit_data->inst->Texture.Texture == TGSI_TEXTURE_SHADOWRECT) {
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half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
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} else {
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struct tgsi_full_instruction txq_inst = {};
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struct lp_build_emit_data txq_emit_data = {};
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/* Query the texture size. */
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txq_inst.Texture.Texture = emit_data->inst->Texture.Texture;
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txq_emit_data.inst = &txq_inst;
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txq_emit_data.dst_type = ctx->v4i32;
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set_tex_fetch_args(ctx, &txq_emit_data, TGSI_OPCODE_TXQ,
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txq_inst.Texture.Texture,
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emit_data->args[1], NULL,
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&ctx->radeon_bld.soa.bld_base.uint_bld.zero,
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1, 0xf);
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txq_emit(NULL, &ctx->radeon_bld.soa.bld_base, &txq_emit_data);
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/* Compute -0.5 / size. */
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for (c = 0; c < 2; c++) {
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half_texel[c] =
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LLVMBuildExtractElement(builder, txq_emit_data.output[0],
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LLVMConstInt(ctx->i32, c, 0), "");
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half_texel[c] = LLVMBuildUIToFP(builder, half_texel[c], ctx->f32, "");
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half_texel[c] =
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lp_build_emit_llvm_unary(&ctx->radeon_bld.soa.bld_base,
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TGSI_OPCODE_RCP, half_texel[c]);
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half_texel[c] = LLVMBuildFMul(builder, half_texel[c],
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LLVMConstReal(ctx->f32, -0.5), "");
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}
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}
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for (c = 0; c < 2; c++) {
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LLVMValueRef tmp;
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LLVMValueRef index = LLVMConstInt(ctx->i32, coord_vgpr_index + c, 0);
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tmp = LLVMBuildExtractElement(builder, coord, index, "");
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tmp = LLVMBuildBitCast(builder, tmp, ctx->f32, "");
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tmp = LLVMBuildFAdd(builder, tmp, half_texel[c], "");
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tmp = LLVMBuildBitCast(builder, tmp, ctx->i32, "");
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coord = LLVMBuildInsertElement(builder, coord, tmp, index, "");
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}
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emit_data->args[0] = coord;
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emit_data->output[emit_data->chan] =
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lp_build_intrinsic(builder, intr_name, emit_data->dst_type,
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emit_data->args, emit_data->arg_count,
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LLVMReadNoneAttribute);
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}
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static void build_tex_intrinsic(const struct lp_build_tgsi_action *action,
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struct lp_build_tgsi_context *bld_base,
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struct lp_build_emit_data *emit_data)
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{
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struct si_shader_context *ctx = si_shader_context(bld_base);
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struct lp_build_context *base = &bld_base->base;
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unsigned opcode = emit_data->inst->Instruction.Opcode;
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unsigned target = emit_data->inst->Texture.Texture;
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const struct tgsi_full_instruction *inst = emit_data->inst;
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unsigned opcode = inst->Instruction.Opcode;
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unsigned target = inst->Texture.Texture;
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char intr_name[127];
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bool has_offset = emit_data->inst->Texture.NumOffsets > 0;
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bool has_offset = inst->Texture.NumOffsets > 0;
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bool is_shadow = tgsi_is_shadow_target(target);
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char type[64];
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const char *name = "llvm.SI.image.sample";
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@ -4795,6 +4865,29 @@ static void build_tex_intrinsic(const struct lp_build_tgsi_action *action,
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name, is_shadow ? ".c" : "", infix,
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has_offset ? ".o" : "", type);
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/* The hardware needs special lowering for Gather4 with integer formats. */
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if (opcode == TGSI_OPCODE_TG4) {
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struct tgsi_shader_info *info = &ctx->shader->selector->info;
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/* This will also work with non-constant indexing because of how
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* glsl_to_tgsi works and we intent to preserve that behavior.
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*/
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const unsigned src_idx = 2;
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unsigned sampler = inst->Src[src_idx].Register.Index;
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assert(inst->Src[src_idx].Register.File == TGSI_FILE_SAMPLER);
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if (info->sampler_type[sampler] == TGSI_RETURN_TYPE_SINT ||
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info->sampler_type[sampler] == TGSI_RETURN_TYPE_UINT) {
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/* Texture coordinates start after:
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* {offset, bias, z-compare, derivatives}
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* Only the offset and z-compare can occur here.
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*/
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si_lower_gather4_integer(ctx, emit_data, intr_name,
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(int)has_offset + (int)is_shadow);
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return;
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}
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}
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emit_data->output[emit_data->chan] = lp_build_intrinsic(
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base->gallivm->builder, intr_name, emit_data->dst_type,
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emit_data->args, emit_data->arg_count,
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