From 63b238e84ea46ae4d4e665e24465805953f4d0bc Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 6 Feb 2024 16:14:30 +0100 Subject: [PATCH] radv: only load 3x32-bit elements when emitting draws with mesh shader Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_device_generated_commands.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_device_generated_commands.c b/src/amd/vulkan/radv_device_generated_commands.c index c20a25f39b8..eab1e9cd06c 100644 --- a/src/amd/vulkan/radv_device_generated_commands.c +++ b/src/amd/vulkan/radv_device_generated_commands.c @@ -1168,7 +1168,7 @@ dgc_emit_draw_mesh_tasks(nir_builder *b, struct dgc_cmdbuf *cs, nir_def *stream_ nir_def *vtx_base_sgpr = load_param16(b, vtx_base_sgpr); nir_def *stream_offset = nir_iadd(b, draw_params_offset, stream_base); - nir_def *draw_data = nir_load_ssbo(b, 4, 32, stream_buf, stream_offset); + nir_def *draw_data = nir_load_ssbo(b, 3, 32, stream_buf, stream_offset); nir_def *x = nir_channel(b, draw_data, 0); nir_def *y = nir_channel(b, draw_data, 1); nir_def *z = nir_channel(b, draw_data, 2);