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radv/gfx10: make sure to wait for idle before clearing GDS

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Otherwise the next streamout operation will overwrite GDS. This
can be improved by tracking if there is a streamout operation in
flight. Currently the driver unconditionally flushes but that
doesn't matter much as NGG streamout is disabled by default.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset 2019-09-11 09:19:21 +02:00
parent 7314f6ef97
commit 63b20fb0cf
1 changed files with 8 additions and 0 deletions
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8
src/amd/vulkan/radv_cmd_buffer.c
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@ -5943,6 +5943,14 @@ gfx10_emit_streamout_begin(struct radv_cmd_buffer *cmd_buffer,
assert(cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10);
assert(firstCounterBuffer + counterBufferCount <= MAX_SO_BUFFERS);
/* Sync because the next streamout operation will overwrite GDS and we
* have to make sure it's idle.
* TODO: Improve by tracking if there is a streamout operation in
* flight.
*/
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VS_PARTIAL_FLUSH;
si_emit_cache_flush(cmd_buffer);
for_each_bit(i, so->enabled_mask) {
int32_t counter_buffer_idx = i - firstCounterBuffer;
if (counter_buffer_idx >= 0 && counter_buffer_idx >= counterBufferCount)