From 63abc083ce5e03843d72465a76fdb93064bc3eb9 Mon Sep 17 00:00:00 2001 From: Francisco Jerez Date: Tue, 25 May 2021 15:43:01 -0700 Subject: [PATCH] intel/fs: Teach IR about EOT instruction writing the accumulator implicitly on TGL+. This is unlikely to have had any negative side effect on the original TGL, but will lead to issues on XeHP+ if the software scoreboard pass isn't able to synchronize the accumulator writes. Fixes: a27542c5ddec8 ("intel/compiler: Clear accumulator register before EOT") Reviewed-by: Jason Ekstrand Part-of: --- src/intel/compiler/brw_shader.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index 4aeff34474b..fdec1d535ac 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -1090,7 +1090,8 @@ backend_instruction::writes_accumulator_implicitly(const struct intel_device_inf ((opcode >= BRW_OPCODE_ADD && opcode < BRW_OPCODE_NOP) || (opcode >= FS_OPCODE_DDX_COARSE && opcode <= FS_OPCODE_LINTERP))) || (opcode == FS_OPCODE_LINTERP && - (!devinfo->has_pln || devinfo->ver <= 6)); + (!devinfo->has_pln || devinfo->ver <= 6)) || + (eot && devinfo->ver >= 12); /* See Wa_14010017096. */ } bool