ac/shader: move scanning some info about input PS declarations

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Samuel Pitoiset 2018-02-26 12:14:35 +01:00
parent e207b2e2c8
commit 639c4f2b54
5 changed files with 26 additions and 15 deletions

View file

@ -5638,12 +5638,6 @@ handle_fs_inputs(struct radv_shader_context *ctx,
}
}
ctx->shader_info->fs.num_interp = index;
if (ctx->input_mask & (1 << VARYING_SLOT_PNTC))
ctx->shader_info->fs.has_pcoord = true;
if (ctx->input_mask & (1 << VARYING_SLOT_PRIMITIVE_ID))
ctx->shader_info->fs.prim_id_input = true;
if (ctx->input_mask & (1 << VARYING_SLOT_LAYER))
ctx->shader_info->fs.layer_input = true;
ctx->shader_info->fs.input_mask = ctx->input_mask >> VARYING_SLOT_VAR0;
if (ctx->shader_info->info.needs_multiview_view_index)

View file

@ -177,11 +177,8 @@ struct ac_shader_variant_info {
unsigned num_interp;
uint32_t input_mask;
uint32_t flat_shaded_mask;
bool has_pcoord;
bool can_discard;
bool early_fragment_test;
bool prim_id_input;
bool layer_input;
} fs;
struct {
unsigned block_size[3];

View file

@ -194,6 +194,21 @@ gather_info_input_decl_ps(const nir_shader *nir, const nir_variable *var,
struct ac_shader_info *info)
{
const struct glsl_type *type = glsl_without_array(var->type);
int idx = var->data.location;
switch (idx) {
case VARYING_SLOT_PNTC:
info->ps.has_pcoord = true;
break;
case VARYING_SLOT_PRIMITIVE_ID:
info->ps.prim_id_input = true;
break;
case VARYING_SLOT_LAYER:
info->ps.layer_input = true;
break;
default:
break;
}
if (glsl_get_base_type(type) == GLSL_TYPE_FLOAT) {
if (var->data.sample)

View file

@ -49,6 +49,9 @@ struct ac_shader_info {
bool writes_z;
bool writes_stencil;
bool writes_sample_mask;
bool has_pcoord;
bool prim_id_input;
bool layer_input;
} ps;
struct {
bool uses_grid_size;

View file

@ -1779,9 +1779,9 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
/* TODO: These are no longer used as keys we should refactor this */
keys[MESA_SHADER_VERTEX].vs.export_prim_id =
pipeline->shaders[MESA_SHADER_FRAGMENT]->info.fs.prim_id_input;
pipeline->shaders[MESA_SHADER_FRAGMENT]->info.info.ps.prim_id_input;
keys[MESA_SHADER_TESS_EVAL].tes.export_prim_id =
pipeline->shaders[MESA_SHADER_FRAGMENT]->info.fs.prim_id_input;
pipeline->shaders[MESA_SHADER_FRAGMENT]->info.info.ps.prim_id_input;
}
if (device->physical_device->rad_info.chip_class >= GFX9 && modules[MESA_SHADER_TESS_CTRL]) {
@ -2750,7 +2750,7 @@ radv_pipeline_generate_ps_inputs(struct radeon_winsys_cs *cs,
unsigned ps_offset = 0;
if (ps->info.fs.prim_id_input) {
if (ps->info.info.ps.prim_id_input) {
unsigned vs_offset = outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID];
if (vs_offset != AC_EXP_PARAM_UNDEFINED) {
ps_input_cntl[ps_offset] = offset_to_ps_input(vs_offset, true);
@ -2758,7 +2758,9 @@ radv_pipeline_generate_ps_inputs(struct radeon_winsys_cs *cs,
}
}
if (ps->info.fs.layer_input) {
if (ps->info.info.ps.layer_input ||
ps->info.info.ps.uses_input_attachments ||
ps->info.info.needs_multiview_view_index) {
unsigned vs_offset = outinfo->vs_output_param_offset[VARYING_SLOT_LAYER];
if (vs_offset != AC_EXP_PARAM_UNDEFINED)
ps_input_cntl[ps_offset] = offset_to_ps_input(vs_offset, true);
@ -2767,7 +2769,7 @@ radv_pipeline_generate_ps_inputs(struct radeon_winsys_cs *cs,
++ps_offset;
}
if (ps->info.fs.has_pcoord) {
if (ps->info.info.ps.has_pcoord) {
unsigned val;
val = S_028644_PT_SPRITE_TEX(1) | S_028644_OFFSET(0x20);
ps_input_cntl[ps_offset] = val;
@ -3026,7 +3028,7 @@ radv_compute_ia_multi_vgt_param_helpers(struct radv_pipeline *pipeline,
}
ia_multi_vgt_param.ia_switch_on_eoi = false;
if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.fs.prim_id_input)
if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.info.ps.prim_id_input)
ia_multi_vgt_param.ia_switch_on_eoi = true;
if (radv_pipeline_has_gs(pipeline) &&
pipeline->shaders[MESA_SHADER_GEOMETRY]->info.info.uses_prim_id)