i915g: implement hw clear

Benefits:
- spares us a relocation.
- needed for zone rendering (if that ever happens).
- just awesome.

v2: Rename the debug option. Completely disabling the blitter is
required for Y tiling to work, so this option will cover other
code paths in the future.

v3: Implement suggestions by Jakob Bornecrantz.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

src/gallium/drivers/i915/i915_batch.h

@@ -37,6 +37,9 @@
 #define OUT_BATCH(dword) \
    i915_winsys_batchbuffer_dword(i915->batch, dword)
 
+#define OUT_BATCH_F(f) \
+   i915_winsys_batchbuffer_float(i915->batch, f)
+
 #define OUT_RELOC(buf, usage, offset) \
    i915_winsys_batchbuffer_reloc(i915->batch, buf, usage, offset, false)
 

src/gallium/drivers/i915/i915_batchbuffer.h

@@ -54,6 +54,16 @@ i915_winsys_batchbuffer_dword_unchecked(struct i915_winsys_batchbuffer *batch,
    batch->ptr += 4;
 }
 
+static INLINE void
+i915_winsys_batchbuffer_float(struct i915_winsys_batchbuffer *batch,
+                              float f)
+{
+   union { float f; unsigned int ui; } uif;
+   uif.f = f;
+   assert (i915_winsys_batchbuffer_space(batch) >= 4);
+   i915_winsys_batchbuffer_dword_unchecked(batch, uif.ui);
+}
+
 static INLINE void
 i915_winsys_batchbuffer_dword(struct i915_winsys_batchbuffer *batch,
                               unsigned dword)

src/gallium/drivers/i915/i915_clear.c

@@ -31,17 +31,118 @@
 
 
 #include "util/u_clear.h"
+#include "util/u_format.h"
+#include "util/u_pack_color.h"
 #include "i915_context.h"
+#include "i915_screen.h"
+#include "i915_reg.h"
+#include "i915_batch.h"
+#include "i915_resource.h"
+#include "i915_state.h"
 
+static void
+i915_clear_emit(struct pipe_context *pipe, unsigned buffers, const float *rgba,
+                double depth, unsigned stencil,
+                unsigned destx, unsigned desty, unsigned width, unsigned height)
+{
+   struct i915_context *i915 = i915_context(pipe);
+   uint32_t clear_params, clear_color, clear_depth, clear_stencil,
+            clear_color8888, packed_z_stencil;
+   union util_color u_color;
+   float f_depth = depth;
+   struct i915_texture *cbuf_tex, *depth_tex;
+
+   cbuf_tex = depth_tex = NULL;
+   clear_params = 0;
+
+   if (buffers & PIPE_CLEAR_COLOR) {
+      struct pipe_surface *cbuf = i915->framebuffer.cbufs[0];
+
+      clear_params |= CLEARPARAM_WRITE_COLOR;
+      cbuf_tex = i915_texture(cbuf->texture);
+      util_pack_color(rgba, cbuf->format, &u_color);
+      if (util_format_get_blocksize(cbuf_tex->b.b.format) == 4)
+         clear_color = u_color.ui;
+      else
+         clear_color = (u_color.ui & 0xffff) | (u_color.ui << 16);
+
+      util_pack_color(rgba, PIPE_FORMAT_B8G8R8A8_UNORM, &u_color);
+      clear_color8888 = u_color.ui;
+   } else
+      clear_color = clear_color8888 = 0;
+
+   clear_depth = clear_stencil = 0;
+   if (buffers & PIPE_CLEAR_DEPTH) {
+      struct pipe_surface *zbuf = i915->framebuffer.zsbuf;
+
+      clear_params |= CLEARPARAM_WRITE_DEPTH;
+      depth_tex = i915_texture(zbuf->texture);
+      packed_z_stencil = util_pack_z_stencil(depth_tex->b.b.format, depth, stencil);
+
+      if (util_format_get_blocksize(depth_tex->b.b.format) == 4) {
+         /* Avoid read-modify-write if there's no stencil. */
+         if (buffers & PIPE_CLEAR_STENCIL
+               || depth_tex->b.b.format != PIPE_FORMAT_Z24_UNORM_S8_USCALED) {
+            clear_params |= CLEARPARAM_WRITE_STENCIL;
+            clear_stencil = packed_z_stencil & 0xff;
+            clear_depth = packed_z_stencil;
+         } else
+            clear_depth = packed_z_stencil & 0xffffff00;
+      } else {
+         clear_depth = (clear_depth & 0xffff) | (clear_depth << 16);
+      }
+   }
+
+   if (i915->hardware_dirty)
+      i915_emit_hardware_state(i915);
+
+   if (!BEGIN_BATCH(7 + 7)) {
+      FLUSH_BATCH(NULL);
+
+      i915_emit_hardware_state(i915);
+      i915->vbo_flushed = 1;
+
+      assert(BEGIN_BATCH(7 + 7));
+   }
+
+   OUT_BATCH(_3DSTATE_CLEAR_PARAMETERS);
+   OUT_BATCH(clear_params | CLEARPARAM_CLEAR_RECT);
+   OUT_BATCH(clear_color);
+   OUT_BATCH(clear_depth);
+   OUT_BATCH(clear_color8888);
+   OUT_BATCH_F(f_depth);
+   OUT_BATCH(clear_stencil);
+
+   OUT_BATCH(_3DPRIMITIVE | PRIM3D_CLEAR_RECT | 5);
+   OUT_BATCH_F(destx + width);
+   OUT_BATCH_F(desty + height);
+   OUT_BATCH_F(destx);
+   OUT_BATCH_F(desty + height);
+   OUT_BATCH_F(destx);
+   OUT_BATCH_F(desty);
+}
 
 /**
  * Clear the given buffers to the specified values.
  * No masking, no scissor (clear entire buffer).
  */
 void
-i915_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba,
-           double depth, unsigned stencil)
+i915_clear_blitter(struct pipe_context *pipe, unsigned buffers, const float *rgba,
+                   double depth, unsigned stencil)
 {
    util_clear(pipe, &i915_context(pipe)->framebuffer, buffers, rgba, depth,
               stencil);
 }
+
+void
+i915_clear_render(struct pipe_context *pipe, unsigned buffers, const float *rgba,
+                  double depth, unsigned stencil)
+{
+   struct i915_context *i915 = i915_context(pipe);
+
+   if (i915->dirty)
+      i915_update_derived(i915);
+
+   i915_clear_emit(pipe, buffers, rgba, depth, stencil,
+                   0, 0, i915->current.fb_width, i915->current.fb_height);
+}

src/gallium/drivers/i915/i915_context.c

@@ -137,7 +137,10 @@ i915_create_context(struct pipe_screen *screen, void *priv)
 
    i915->base.destroy = i915_destroy;
 
-   i915->base.clear = i915_clear;
+   if (i915_screen(screen)->debug.use_blitter)
+      i915->base.clear = i915_clear_blitter;
+   else
+      i915->base.clear = i915_clear_render;
 
    i915->base.draw_vbo = i915_draw_vbo;
 

src/gallium/drivers/i915/i915_context.h

@@ -158,6 +158,8 @@ struct i915_state
    unsigned dst_buf_vars;
    uint32_t draw_offset;
    uint32_t draw_size;
+   /* for clears */
+   uint16_t fb_height, fb_width;
 
    unsigned id;			/* track lost context events */
 };
@@ -326,8 +328,10 @@ void i915_emit_hardware_state(struct i915_context *i915 );
 /***********************************************************************
  * i915_clear.c: 
  */
-void i915_clear( struct pipe_context *pipe, unsigned buffers, const float *rgba,
-                 double depth, unsigned stencil);
+void i915_clear_blitter(struct pipe_context *pipe, unsigned buffers, const float *rgba,
+                        double depth, unsigned stencil);
+void i915_clear_render(struct pipe_context *pipe, unsigned buffers, const float *rgba,
+                       double depth, unsigned stencil);
 
 
 /***********************************************************************

src/gallium/drivers/i915/i915_debug.c

@@ -46,17 +46,18 @@ static const struct debug_named_value debug_options[] = {
 };
 
 unsigned i915_debug = 0;
-boolean i915_tiling = TRUE;
 
 DEBUG_GET_ONCE_FLAGS_OPTION(i915_debug, "I915_DEBUG", debug_options, 0)
 DEBUG_GET_ONCE_BOOL_OPTION(i915_no_tiling, "I915_NO_TILING", FALSE)
 DEBUG_GET_ONCE_BOOL_OPTION(i915_lie, "I915_LIE", FALSE)
+DEBUG_GET_ONCE_BOOL_OPTION(i915_use_blitter, "I915_USE_BLITTER", FALSE)
 
 void i915_debug_init(struct i915_screen *is)
 {
    i915_debug = debug_get_option_i915_debug();
    is->debug.tiling = !debug_get_option_i915_no_tiling();
    is->debug.lie = debug_get_option_i915_lie();
+   is->debug.use_blitter = debug_get_option_i915_use_blitter();
 }
 
 

src/gallium/drivers/i915/i915_screen.h

@@ -49,6 +49,7 @@ struct i915_screen
    struct {
       boolean tiling;
       boolean lie;
+      boolean use_blitter;
    } debug;
 };
 

src/gallium/drivers/i915/i915_state_static.c

@@ -167,6 +167,8 @@ static void update_framebuffer(struct i915_context *i915)
       i915_set_flush_dirty(i915, I915_PIPELINE_FLUSH);
    }
    i915->current.draw_size = (w - 1 + x) | ((h - 1 + y) << 16);
+   i915->current.fb_height = h;
+   i915->current.fb_width = w;
 
    i915->hardware_dirty |= I915_HW_STATIC;