fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-31 14:10:09 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

nv50/ir/ra: prefer def == src2 for fma with immediates on nvc0

Browse source 
This helps with the PostRALoadPropagation pass moving long immediates into
FMA/MAD instructions.

changes in shader-db:
total instructions in shared programs : 5894114 -> 5886074 (-0.14%)
total gprs used in shared programs    : 666558 -> 666563 (0.00%)
total shared used in shared programs  : 520416 -> 520416 (0.00%)
total local used in shared programs   : 53524 -> 53524 (0.00%)
total bytes used in shared programs   : 54006744 -> 53932472 (-0.14%)

                local     shared        gpr       inst      bytes
    helped           0           0           2        4192        4192
      hurt           0           0           7           9           9

Signed-off-by: Karol Herbst <karolherbst@gmail.com>
[imirkin: minor edits to separate nv50 and nvc0+ cases]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Karol Herbst 2018-03-27 19:10:34 +02:00 • committed by Ilia Mirkin
parent cc35b76e99
commit 63572091b5
1 changed files with 29 additions and 10 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

39
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
View file

@ -1466,17 +1466,36 @@ GCRA::allocateRegisters(ArrayList& insns)
nodes[i].init(regs, lval);
RIG.insert(&nodes[i]);
if (lval->inFile(FILE_GPR) && lval->getInsn() != NULL &&
prog->getTarget()->getChipset() < 0xc0) {
if (lval->inFile(FILE_GPR) && lval->getInsn() != NULL) {
Instruction *insn = lval->getInsn();
if (insn->op == OP_MAD || insn->op == OP_FMA || insn->op == OP_SAD)
// Short encoding only possible if they're all GPRs, no need to
// affect them otherwise.
if (insn->flagsDef < 0 &&
insn->src(0).getFile() == FILE_GPR &&
insn->src(1).getFile() == FILE_GPR &&
insn->src(2).getFile() == FILE_GPR)
nodes[i].addRegPreference(getNode(insn->getSrc(2)->asLValue()));
if (insn->op != OP_MAD && insn->op != OP_FMA && insn->op != OP_SAD)
continue;
// For both of the cases below, we only want to add the preference
// if all arguments are in registers.
if (insn->src(0).getFile() != FILE_GPR ||
insn->src(1).getFile() != FILE_GPR ||
insn->src(2).getFile() != FILE_GPR)
continue;
if (prog->getTarget()->getChipset() < 0xc0) {
// Outputting a flag is not supported with short encodings nor
// with immediate arguments.
// See handleMADforNV50.
if (insn->flagsDef >= 0)
continue;
} else {
// We can only fold immediate arguments if dst == src2. This
// only matters if one of the first two arguments is an
// immediate. This form is also only supported for floats.
// See handleMADforNVC0.
ImmediateValue imm;
if (insn->dType != TYPE_F32)
continue;
if (!insn->src(0).getImmediate(imm) &&
!insn->src(1).getImmediate(imm))
continue;
}
nodes[i].addRegPreference(getNode(insn->getSrc(2)->asLValue()));
}
}
}