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nir: add {load,store}_global_etna intrinsics

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Acked-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29402>
This commit is contained in:
Italo Nicola 2023-03-24 17:16:58 +00:00 • committed by Marge Bot
parent 7e7ee6a604
commit 62c8e58f39
3 changed files with 10 additions and 0 deletions
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1
src/compiler/nir/nir_gather_info.c
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@ -365,6 +365,7 @@ nir_intrinsic_writes_external_memory(const nir_intrinsic_instr *instr)
case nir_intrinsic_ssbo_atomic_ir3:
case nir_intrinsic_ssbo_atomic_swap_ir3:
case nir_intrinsic_store_global:
case nir_intrinsic_store_global_etna:
case nir_intrinsic_store_global_ir3:
case nir_intrinsic_store_global_amd:
case nir_intrinsic_store_ssbo:

7
src/compiler/nir/nir_intrinsics.py
View file

@ -1340,6 +1340,13 @@ store("global_ir3", [2, 1], indices=[ACCESS, ALIGN_MUL, ALIGN_OFFSET])
# the alignment applies to the base address
load("global_ir3", [2, 1], indices=[ACCESS, ALIGN_MUL, ALIGN_OFFSET, RANGE_BASE, RANGE], flags=[CAN_ELIMINATE])
# Etnaviv-specific load/glboal intrinsics. They take a 32-bit base address and
# a 32-bit offset, which doesn't need to be an immediate.
# src[] = { value, address, 32-bit offset }.
store("global_etna", [1, 1], [WRITE_MASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
# src[] = { address, 32-bit offset }.
load("global_etna", [1, 1], [ACCESS, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
# IR3-specific bindless handle specifier. Similar to vulkan_resource_index, but
# without the binding because the hardware expects a single flattened index
# rather than a (binding, index) pair. We may also want to use this with GL.

2
src/compiler/nir/nir_lower_io.c
View file

@ -2748,6 +2748,7 @@ nir_get_io_offset_src_number(const nir_intrinsic_instr *instr)
case nir_intrinsic_load_global:
case nir_intrinsic_load_global_2x32:
case nir_intrinsic_load_global_constant:
case nir_intrinsic_load_global_etna:
case nir_intrinsic_load_scratch:
case nir_intrinsic_load_fs_input_interp_deltas:
case nir_intrinsic_shared_atomic:
@ -2770,6 +2771,7 @@ nir_get_io_offset_src_number(const nir_intrinsic_instr *instr)
case nir_intrinsic_store_task_payload:
case nir_intrinsic_store_global:
case nir_intrinsic_store_global_2x32:
case nir_intrinsic_store_global_etna:
case nir_intrinsic_store_scratch:
case nir_intrinsic_ssbo_atomic:
case nir_intrinsic_ssbo_atomic_swap: