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pan/bifrost: Sync disassembler with Ryan's tree
The disassembler was updated to move common code with the compiler into a shared header. Additional, some new ops and control registers relating to rounding were added. Signed-off-by: Ryan Houdek <Sonicadvance1@gmail.com> Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
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3 changed files with 130 additions and 19 deletions
120
src/panfrost/bifrost/bifrost_ops.h
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120
src/panfrost/bifrost/bifrost_ops.h
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@ -0,0 +1,120 @@
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/*
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* Copyright (C) 2019 Ryan Houdek <Sonicadvance1@gmail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef __bifrost_ops_h__
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#define __bifrost_ops_h__
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enum bifrost_ir_ops {
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op_fma_f32 = 0x0,
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op_fmul_f32,
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op_fadd_f32,
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op_frcp_fast_f32,
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op_max_f32,
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op_min_f32,
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op_add_i32,
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op_sub_i32,
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op_imad,
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op_mul_i32,
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op_or_i32,
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op_and_i32,
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op_lshift_i32,
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op_xor_i32,
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op_rshift_i32,
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op_arshift_i32,
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op_csel_i32,
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op_imin3_i32,
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op_umin3_i32,
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op_imax3_i32,
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op_umax3_i32,
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op_branch,
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// unary
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op_trunc,
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op_ceil,
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op_floor,
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op_round,
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op_roundeven,
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op_mov,
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op_movi,
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op_ld_ubo_v1,
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op_ld_ubo_v2,
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op_ld_ubo_v3,
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op_ld_ubo_v4,
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op_ld_attr_v1,
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op_ld_attr_v2,
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op_ld_attr_v3,
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op_ld_attr_v4,
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op_ld_var_addr,
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op_st_vary_v1,
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op_st_vary_v2,
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op_st_vary_v3,
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op_st_vary_v4,
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op_store_v1,
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op_store_v2,
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op_store_v3,
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op_store_v4,
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op_create_vector,
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op_extract_element,
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op_last,
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};
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enum branch_cond {
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BR_COND_LT = 0,
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BR_COND_LE = 1,
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BR_COND_GE = 2,
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BR_COND_GT = 3,
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// Equal vs. not-equal determined by src0/src1 comparison
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BR_COND_EQ = 4,
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// floating-point comparisons
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// Becomes UNE when you flip the arguments
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BR_COND_OEQ = 5,
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// TODO what happens when you flip the arguments?
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BR_COND_OGT = 6,
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BR_COND_OLT = 7,
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};
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enum branch_code {
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BR_ALWAYS = 63,
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};
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enum csel_cond {
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CSEL_NEQ_0 = 0,
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CSEL_FEQ,
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CSEL_FGTR,
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CSEL_FGE,
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CSEL_IEQ,
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CSEL_IGT,
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CSEL_IGE,
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CSEL_UGT,
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CSEL_UGE,
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};
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#endif
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@ -31,6 +31,7 @@
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#include <string.h>
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#include "bifrost.h"
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#include "bifrost_ops.h"
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#include "disassemble.h"
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#include "util/macros.h"
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@ -166,21 +167,6 @@ struct bifrost_dual_tex_ctrl {
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unsigned unk1 : 22;
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};
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enum branch_cond {
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BR_COND_LT = 0,
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BR_COND_LE = 1,
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BR_COND_GE = 2,
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BR_COND_GT = 3,
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// Equal vs. not-equal determined by src0/src1 comparison
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BR_COND_EQ = 4,
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// floating-point comparisons
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// Becomes UNE when you flip the arguments
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BR_COND_OEQ = 5,
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// TODO what happens when you flip the arguments?
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BR_COND_OGT = 6,
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BR_COND_OLT = 7,
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};
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enum branch_bit_size {
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BR_SIZE_32 = 0,
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BR_SIZE_16XX = 1,
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@ -201,10 +187,6 @@ enum branch_bit_size {
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BR_SIZE_ZERO = 7,
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};
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enum branch_code {
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BR_ALWAYS = 63,
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};
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void dump_header(struct bifrost_header header, bool verbose);
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void dump_instr(const struct bifrost_alu_inst *instr, struct bifrost_regs next_regs, uint64_t *consts,
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unsigned data_reg, unsigned offset, bool verbose);
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@ -287,6 +269,7 @@ static struct bifrost_reg_ctrl DecodeRegCtrl(struct bifrost_regs regs)
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case 1:
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decoded.fma_write_unit = REG_WRITE_TWO;
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break;
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case 2:
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case 3:
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decoded.fma_write_unit = REG_WRITE_TWO;
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decoded.read_reg3 = true;
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@ -318,6 +301,8 @@ static struct bifrost_reg_ctrl DecodeRegCtrl(struct bifrost_regs regs)
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decoded.add_write_unit = REG_WRITE_TWO;
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decoded.clause_start = true;
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break;
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case 7:
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case 15:
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decoded.fma_write_unit = REG_WRITE_THREE;
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decoded.add_write_unit = REG_WRITE_TWO;
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@ -677,14 +662,18 @@ static const struct fma_op_info FMAOpInfos[] = {
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// integer.
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{ 0xe03ad, "FRSQ_FREXPE", FMA_ONE_SRC },
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{ 0xe03c5, "LOG_FREXPE", FMA_ONE_SRC },
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{ 0xe03fa, "CLZ", FMA_ONE_SRC },
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{ 0xe0b80, "IMAX3", FMA_THREE_SRC },
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{ 0xe0bc0, "UMAX3", FMA_THREE_SRC },
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{ 0xe0c00, "IMIN3", FMA_THREE_SRC },
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{ 0xe0c40, "UMIN3", FMA_THREE_SRC },
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{ 0xe0ec5, "ROUND", FMA_ONE_SRC },
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{ 0xe0f40, "CSEL", FMA_THREE_SRC }, // src2 != 0 ? src1 : src0
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{ 0xe0fc0, "MUX.i32", FMA_THREE_SRC }, // see ADD comment
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{ 0xe1805, "ROUNDEVEN", FMA_ONE_SRC },
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{ 0xe1845, "CEIL", FMA_ONE_SRC },
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{ 0xe1885, "FLOOR", FMA_ONE_SRC },
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{ 0xe18c5, "TRUNC", FMA_ONE_SRC },
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{ 0xe19b0, "ATAN_LDEXP.Y.f32", FMA_TWO_SRC },
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{ 0xe19b8, "ATAN_LDEXP.X.f32", FMA_TWO_SRC },
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// These instructions in the FMA slot, together with LSHIFT_ADD_HIGH32.i32
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@ -1177,6 +1166,7 @@ static const struct add_op_info add_op_infos[] = {
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{ 0x07bc5, "FLOG_FREXPE", ADD_ONE_SRC },
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{ 0x07d45, "CEIL", ADD_ONE_SRC },
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{ 0x07d85, "FLOOR", ADD_ONE_SRC },
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{ 0x07dc5, "TRUNC", ADD_ONE_SRC },
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{ 0x07f18, "LSHIFT_ADD_HIGH32.i32", ADD_TWO_SRC },
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{ 0x08000, "LD_ATTR.f16", ADD_LOAD_ATTR, true },
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{ 0x08100, "LD_ATTR.v2f16", ADD_LOAD_ATTR, true },
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@ -25,4 +25,5 @@
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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void disassemble_bifrost(uint8_t *code, size_t size, bool verbose);
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