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i965/miptree: Relax size alignment for linear surfaces
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
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1 changed files with 6 additions and 1 deletions
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@ -822,7 +822,12 @@ make_surface(struct brw_context *brw, GLenum target, mesa_format format,
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}
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}
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assert(mt->surf.size % mt->surf.row_pitch == 0);
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/* In case of linear the buffer gets padded by fixed 64 bytes and therefore
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* the size may not be multiple of row_pitch.
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* See isl_apply_surface_padding().
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*/
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if (mt->surf.tiling != ISL_TILING_LINEAR)
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assert(mt->surf.size % mt->surf.row_pitch == 0);
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if (!bo) {
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mt->bo = brw_bo_alloc_tiled(brw->bufmgr, "isl-miptree",
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