mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2025-12-21 09:20:12 +01:00
nak: Rework FS input interpolation
This gives FS I/O the same treatment as we did for vertex attributes in that we now have a NIR intrinsic which pretty closely matches the hardware and we lower to that before going into NAK. This gives us a bit more control in the NIR. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26181>
This commit is contained in:
parent
d3c5688cf5
commit
618bdb8571
5 changed files with 214 additions and 139 deletions
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@ -619,6 +619,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
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case nir_intrinsic_isberd_nv:
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case nir_intrinsic_isberd_nv:
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case nir_intrinsic_al2p_nv:
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case nir_intrinsic_al2p_nv:
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case nir_intrinsic_ald_nv:
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case nir_intrinsic_ald_nv:
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case nir_intrinsic_ipa_nv:
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is_divergent = true;
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is_divergent = true;
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break;
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break;
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@ -2018,6 +2018,9 @@ intrinsic("ald_nv", dest_comp=0, src_comp=[1, 1], bit_sizes=[32],
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# FLAGS is struct nak_nir_attr_io_flags
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# FLAGS is struct nak_nir_attr_io_flags
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intrinsic("ast_nv", src_comp=[0, 1, 1],
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intrinsic("ast_nv", src_comp=[0, 1, 1],
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indices=[BASE, RANGE_BASE, RANGE, FLAGS], flags=[])
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indices=[BASE, RANGE_BASE, RANGE, FLAGS], flags=[])
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# src[] = { inv_w, offset }.
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intrinsic("ipa_nv", dest_comp=1, src_comp=[1, 1], bit_sizes=[32],
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indices=[BASE, FLAGS], flags=[CAN_ELIMINATE, CAN_REORDER])
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# NVIDIA-specific Geometry Shader intrinsics.
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# NVIDIA-specific Geometry Shader intrinsics.
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# These contain an additional integer source and destination with the primitive handle input/output.
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# These contain an additional integer source and destination with the primitive handle input/output.
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@ -1557,6 +1557,56 @@ impl<'a> ShaderFromNir<'a> {
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});
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});
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self.set_dst(&intrin.def, dst);
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self.set_dst(&intrin.def, dst);
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}
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}
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nir_intrinsic_ipa_nv => {
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let addr = u16::try_from(intrin.base()).unwrap();
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let flags = intrin.flags();
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let flags: nak_nir_ipa_flags =
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unsafe { std::mem::transmute_copy(&flags) };
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let mode = match flags.interp_mode() {
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NAK_INTERP_MODE_PERSPECTIVE => PixelImap::Perspective,
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NAK_INTERP_MODE_SCREEN_LINEAR => PixelImap::ScreenLinear,
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NAK_INTERP_MODE_CONSTANT => PixelImap::Constant,
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_ => panic!("Unsupported interp mode"),
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};
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let freq = match flags.interp_freq() {
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NAK_INTERP_FREQ_PASS => InterpFreq::Pass,
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NAK_INTERP_FREQ_CONSTANT => InterpFreq::Constant,
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NAK_INTERP_FREQ_STATE => InterpFreq::State,
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_ => panic!("Invalid interp freq"),
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};
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let loc = match flags.interp_loc() {
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NAK_INTERP_LOC_DEFAULT => InterpLoc::Default,
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NAK_INTERP_LOC_CENTROID => InterpLoc::Centroid,
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NAK_INTERP_LOC_OFFSET => InterpLoc::Offset,
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_ => panic!("Invalid interp loc"),
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};
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let offset = if loc == InterpLoc::Offset {
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self.get_src(&srcs[1])
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} else {
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0.into()
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};
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let ShaderIoInfo::Fragment(io) = &mut self.info.io else {
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panic!("OpIpa is only used for fragment shaders");
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};
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io.mark_attr_read(addr, mode);
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let dst = b.alloc_ssa(RegFile::GPR, 1);
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b.push_op(OpIpa {
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dst: dst.into(),
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addr: addr,
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freq: freq,
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loc: loc,
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offset: offset,
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});
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self.set_dst(&intrin.def, dst);
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}
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nir_intrinsic_isberd_nv => {
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nir_intrinsic_isberd_nv => {
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let dst = b.alloc_ssa(RegFile::GPR, 1);
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let dst = b.alloc_ssa(RegFile::GPR, 1);
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b.push_op(OpIsberd {
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b.push_op(OpIsberd {
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@ -1596,99 +1646,6 @@ impl<'a> ShaderFromNir<'a> {
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});
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});
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self.set_dst(&intrin.def, dst);
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self.set_dst(&intrin.def, dst);
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}
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}
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nir_intrinsic_load_input => {
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let ShaderIoInfo::Fragment(io) = &mut self.info.io else {
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panic!("load_input is only used for fragment shaders");
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};
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assert!(intrin.def.bit_size() == 32);
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let comps = intrin.def.num_components;
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let addr = u16::try_from(intrin.base()).unwrap()
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+ u16::try_from(srcs[0].as_uint().unwrap()).unwrap()
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+ 4 * u16::try_from(intrin.component()).unwrap();
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let dst = b.alloc_ssa(RegFile::GPR, comps);
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for c in 0..comps {
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let c_addr = addr + 4 * u16::from(c);
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io.mark_attr_read(c_addr, PixelImap::Constant);
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b.push_op(OpIpa {
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dst: dst[usize::from(c)].into(),
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addr: c_addr,
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freq: InterpFreq::Constant,
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loc: InterpLoc::Default,
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offset: SrcRef::Zero.into(),
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});
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}
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self.set_dst(&intrin.def, dst);
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}
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nir_intrinsic_load_interpolated_input => {
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let bary =
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srcs[0].as_def().parent_instr().as_intrinsic().unwrap();
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let addr = u16::try_from(intrin.base()).unwrap()
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+ u16::try_from(srcs[1].as_uint().unwrap()).unwrap()
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+ u16::try_from(intrin.component()).unwrap() * 4;
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let (freq, loc) = match bary.intrinsic {
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nir_intrinsic_load_barycentric_at_offset_nv => {
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(InterpFreq::Pass, InterpLoc::Offset)
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}
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nir_intrinsic_load_barycentric_centroid => {
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(InterpFreq::Pass, InterpLoc::Centroid)
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}
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nir_intrinsic_load_barycentric_pixel => {
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(InterpFreq::Pass, InterpLoc::Default)
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}
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nir_intrinsic_load_barycentric_sample => {
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(InterpFreq::Pass, InterpLoc::Centroid)
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}
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_ => panic!("Unsupported barycentric"),
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};
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let interp_mode = match bary.interp_mode() {
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INTERP_MODE_NONE | INTERP_MODE_SMOOTH => {
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PixelImap::Perspective
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}
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INTERP_MODE_FLAT => PixelImap::Constant,
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INTERP_MODE_NOPERSPECTIVE => PixelImap::ScreenLinear,
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INTERP_MODE_EXPLICIT => PixelImap::Unused,
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_ => panic!("Unsupported interp mode"),
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};
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let offset = match bary.intrinsic {
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nir_intrinsic_load_barycentric_at_offset_nv => {
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self.get_src(&bary.get_src(0))
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}
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nir_intrinsic_load_barycentric_centroid
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| nir_intrinsic_load_barycentric_pixel
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| nir_intrinsic_load_barycentric_sample => 0.into(),
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_ => panic!("Unsupported interp mode"),
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};
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assert!(intrin.def.bit_size() == 32);
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let comps = intrin.def.num_components();
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let dst = b.alloc_ssa(RegFile::GPR, comps);
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let ShaderIoInfo::Fragment(io) = &mut self.info.io else {
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panic!("input interpolation is only allowed in fragment shaders");
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};
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for c in 0..comps {
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let c_addr = addr + 4 * u16::from(c);
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io.mark_attr_read(c_addr, interp_mode);
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b.push_op(OpIpa {
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dst: dst[usize::from(c)].into(),
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addr: c_addr,
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freq: freq,
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loc: loc,
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offset: offset,
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});
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}
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self.set_dst(&intrin.def, dst);
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}
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nir_intrinsic_load_sample_id => {
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nir_intrinsic_load_sample_id => {
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let dst = b.alloc_ssa(RegFile::GPR, 1);
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let dst = b.alloc_ssa(RegFile::GPR, 1);
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b.push_op(OpPixLd {
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b.push_op(OpPixLd {
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@ -557,14 +557,54 @@ nak_xfb_from_nir(const struct nir_xfb_info *nir_xfb)
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}
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}
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static nir_def *
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static nir_def *
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load_frag_w(nir_builder *b, nir_def *bary)
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load_frag_w(nir_builder *b, enum nak_interp_loc interp_loc)
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{
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{
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const uint16_t w_addr =
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const uint16_t w_addr =
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nak_sysval_attr_addr(SYSTEM_VALUE_FRAG_COORD) + 12;
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nak_sysval_attr_addr(SYSTEM_VALUE_FRAG_COORD) + 12;
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return nir_load_interpolated_input(b, 1, 32, bary,
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const struct nak_nir_ipa_flags flags = {
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nir_imm_int(b, 0), .base = w_addr,
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.interp_mode = NAK_INTERP_MODE_PERSPECTIVE,
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.dest_type = nir_type_float32);
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.interp_freq = NAK_INTERP_FREQ_PASS,
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.interp_loc = interp_loc,
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};
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uint32_t flags_u32;
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memcpy(&flags_u32, &flags, sizeof(flags_u32));
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return nir_ipa_nv(b, nir_imm_float(b, 0), nir_undef(b, 1, 32),
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.base = w_addr, .flags = flags_u32);
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}
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static nir_def *
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load_interpolated_input(nir_builder *b, unsigned num_components, uint32_t addr,
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enum nak_interp_mode interp_mode,
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enum nak_interp_loc interp_loc,
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nir_def *inv_w, nir_def *offset,
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const struct nak_compiler *nak)
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{
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if (offset == NULL)
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offset = nir_undef(b, 1, 32);
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if (nak->sm >= 70) {
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const struct nak_nir_ipa_flags flags = {
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.interp_mode = interp_mode,
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.interp_freq = NAK_INTERP_FREQ_PASS,
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.interp_loc = interp_loc,
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};
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uint32_t flags_u32;
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memcpy(&flags_u32, &flags, sizeof(flags_u32));
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nir_def *comps[NIR_MAX_VEC_COMPONENTS];
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for (unsigned c = 0; c < num_components; c++) {
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comps[c] = nir_ipa_nv(b, nir_undef(b, 1, 32), offset,
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.base = addr + c * 4,
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.flags = flags_u32);
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if (interp_mode == NAK_INTERP_MODE_PERSPECTIVE)
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comps[c] = nir_fmul(b, comps[c], inv_w);
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}
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return nir_vec(b, comps, num_components);
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} else {
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unreachable("Figure out input interpolation on Maxwell");
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}
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}
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}
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struct lower_fs_input_ctx {
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struct lower_fs_input_ctx {
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@ -586,51 +626,25 @@ lower_fs_input_intrin(nir_builder *b, nir_intrinsic_instr *intrin, void *data)
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return true;
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return true;
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}
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}
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case nir_intrinsic_load_barycentric_at_offset: {
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b->cursor = nir_before_instr(&intrin->instr);
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nir_def *offset_f = intrin->src[0].ssa;
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offset_f = nir_fclamp(b, offset_f, nir_imm_float(b, -0.5),
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nir_imm_float(b, 0.437500));
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nir_def *offset_fixed =
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nir_f2i32(b, nir_fmul_imm(b, offset_f, 4096.0));
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nir_def *offset_packed =
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nir_ior(b, nir_ishl_imm(b, nir_channel(b, offset_fixed, 1), 16),
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nir_iand_imm(b, nir_channel(b, offset_fixed, 0), 0xffff));
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intrin->intrinsic = nir_intrinsic_load_barycentric_at_offset_nv;
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nir_src_rewrite(&intrin->src[0], offset_packed);
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return true;
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}
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case nir_intrinsic_load_frag_coord:
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case nir_intrinsic_load_frag_coord:
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case nir_intrinsic_load_point_coord:
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case nir_intrinsic_load_point_coord:
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case nir_intrinsic_load_sample_pos: {
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case nir_intrinsic_load_sample_pos: {
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b->cursor = nir_before_instr(&intrin->instr);
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b->cursor = nir_before_instr(&intrin->instr);
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nir_def *bary;
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const enum nak_interp_loc interp_loc =
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if (b->shader->info.fs.uses_sample_shading) {
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b->shader->info.fs.uses_sample_shading ? NAK_INTERP_LOC_CENTROID
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bary = nir_load_barycentric_sample(b, 32,
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: NAK_INTERP_LOC_DEFAULT;
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.interp_mode = INTERP_MODE_SMOOTH);
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} else {
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bary = nir_load_barycentric_pixel(b, 32,
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.interp_mode = INTERP_MODE_SMOOTH);
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}
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const uint32_t addr =
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const uint32_t addr =
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intrin->intrinsic == nir_intrinsic_load_point_coord ?
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intrin->intrinsic == nir_intrinsic_load_point_coord ?
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nak_sysval_attr_addr(SYSTEM_VALUE_POINT_COORD) :
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nak_sysval_attr_addr(SYSTEM_VALUE_POINT_COORD) :
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nak_sysval_attr_addr(SYSTEM_VALUE_FRAG_COORD);
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nak_sysval_attr_addr(SYSTEM_VALUE_FRAG_COORD);
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nir_def *coord =
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nir_def *w = load_frag_w(b, interp_loc);
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nir_load_interpolated_input(b, intrin->def.num_components, 32,
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nir_def *coord = load_interpolated_input(b, intrin->def.num_components,
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bary, nir_imm_int(b, 0),
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addr,
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.base = addr,
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NAK_INTERP_MODE_PERSPECTIVE,
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.dest_type = nir_type_float32);
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interp_loc, nir_frcp(b, w),
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NULL, ctx->nak);
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nir_def *w = load_frag_w(b, bary);
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coord = nir_fdiv(b, coord, w);
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switch (intrin->intrinsic) {
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_frag_coord:
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case nir_intrinsic_load_frag_coord:
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@ -651,17 +665,91 @@ lower_fs_input_intrin(nir_builder *b, nir_intrinsic_instr *intrin, void *data)
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return true;
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return true;
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}
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}
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case nir_intrinsic_load_input: {
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b->cursor = nir_before_instr(&intrin->instr);
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uint16_t addr = nir_intrinsic_base(intrin) +
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nir_src_as_uint(intrin->src[0]) +
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nir_intrinsic_component(intrin) * 4;
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const struct nak_nir_ipa_flags flags = {
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.interp_mode = NAK_INTERP_MODE_CONSTANT,
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.interp_freq = NAK_INTERP_FREQ_CONSTANT,
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.interp_loc = NAK_INTERP_LOC_DEFAULT,
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};
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uint32_t flags_u32;
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memcpy(&flags_u32, &flags, sizeof(flags_u32));
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nir_def *comps[NIR_MAX_VEC_COMPONENTS];
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for (unsigned c = 0; c < intrin->def.num_components; c++) {
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comps[c] = nir_ipa_nv(b, nir_imm_float(b, 0), nir_undef(b, 1, 32),
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||||||
|
.base = addr + c * 4, .flags = flags_u32);
|
||||||
|
}
|
||||||
|
nir_def *res = nir_vec(b, comps, intrin->def.num_components);
|
||||||
|
|
||||||
|
nir_def_rewrite_uses(&intrin->def, res);
|
||||||
|
nir_instr_remove(&intrin->instr);
|
||||||
|
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
|
||||||
case nir_intrinsic_load_interpolated_input: {
|
case nir_intrinsic_load_interpolated_input: {
|
||||||
|
b->cursor = nir_before_instr(&intrin->instr);
|
||||||
|
|
||||||
|
const uint16_t addr = nir_intrinsic_base(intrin) +
|
||||||
|
nir_src_as_uint(intrin->src[1]) +
|
||||||
|
nir_intrinsic_component(intrin) * 4;
|
||||||
|
|
||||||
nir_intrinsic_instr *bary = nir_src_as_intrinsic(intrin->src[0]);
|
nir_intrinsic_instr *bary = nir_src_as_intrinsic(intrin->src[0]);
|
||||||
if (nir_intrinsic_interp_mode(bary) != INTERP_MODE_SMOOTH &&
|
|
||||||
nir_intrinsic_interp_mode(bary) != INTERP_MODE_NONE)
|
|
||||||
return false;
|
|
||||||
|
|
||||||
b->cursor = nir_after_instr(&intrin->instr);
|
enum nak_interp_mode interp_mode;
|
||||||
|
if (nir_intrinsic_interp_mode(bary) == INTERP_MODE_SMOOTH ||
|
||||||
|
nir_intrinsic_interp_mode(bary) == INTERP_MODE_NONE)
|
||||||
|
interp_mode = NAK_INTERP_MODE_PERSPECTIVE;
|
||||||
|
else
|
||||||
|
interp_mode = NAK_INTERP_MODE_SCREEN_LINEAR;
|
||||||
|
|
||||||
/* Perspective-correct interpolated inputs need to be divided by .w */
|
nir_def *offset = NULL;
|
||||||
nir_def *res = nir_fdiv(b, &intrin->def, load_frag_w(b, &bary->def));
|
enum nak_interp_loc interp_loc;
|
||||||
nir_def_rewrite_uses_after(&intrin->def, res, res->parent_instr);
|
switch (bary->intrinsic) {
|
||||||
|
case nir_intrinsic_load_barycentric_at_offset: {
|
||||||
|
interp_loc = NAK_INTERP_LOC_OFFSET;
|
||||||
|
|
||||||
|
nir_def *offset_f = bary->src[0].ssa;
|
||||||
|
offset_f = nir_fclamp(b, offset_f, nir_imm_float(b, -0.5),
|
||||||
|
nir_imm_float(b, 0.437500));
|
||||||
|
nir_def *offset_fixed =
|
||||||
|
nir_f2i32(b, nir_fmul_imm(b, offset_f, 4096.0));
|
||||||
|
offset = nir_ior(b, nir_ishl_imm(b, nir_channel(b, offset_fixed, 1),
|
||||||
|
16),
|
||||||
|
nir_iand_imm(b, nir_channel(b, offset_fixed, 0),
|
||||||
|
0xffff));
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
case nir_intrinsic_load_barycentric_centroid:
|
||||||
|
case nir_intrinsic_load_barycentric_sample:
|
||||||
|
interp_loc = NAK_INTERP_LOC_CENTROID;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case nir_intrinsic_load_barycentric_pixel:
|
||||||
|
interp_loc = NAK_INTERP_LOC_DEFAULT;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
unreachable("Unsupported barycentric");
|
||||||
|
}
|
||||||
|
|
||||||
|
nir_def *inv_w = NULL;
|
||||||
|
if (interp_mode == NAK_INTERP_MODE_PERSPECTIVE)
|
||||||
|
inv_w = nir_frcp(b, load_frag_w(b, interp_loc));
|
||||||
|
|
||||||
|
nir_def *res = load_interpolated_input(b, intrin->def.num_components,
|
||||||
|
addr, interp_mode, interp_loc,
|
||||||
|
inv_w, offset, ctx->nak);
|
||||||
|
|
||||||
|
nir_def_rewrite_uses(&intrin->def, res);
|
||||||
|
nir_instr_remove(&intrin->instr);
|
||||||
|
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
@ -693,6 +781,7 @@ nak_nir_lower_fs_inputs(nir_shader *nir,
|
||||||
const struct nak_fs_key *fs_key)
|
const struct nak_fs_key *fs_key)
|
||||||
{
|
{
|
||||||
NIR_PASS_V(nir, nak_nir_lower_varyings, nir_var_shader_in);
|
NIR_PASS_V(nir, nak_nir_lower_varyings, nir_var_shader_in);
|
||||||
|
NIR_PASS_V(nir, nir_opt_constant_folding);
|
||||||
|
|
||||||
const struct lower_fs_input_ctx fs_in_ctx = {
|
const struct lower_fs_input_ctx fs_in_ctx = {
|
||||||
.nak = nak,
|
.nak = nak,
|
||||||
|
|
|
||||||
|
|
@ -156,6 +156,31 @@ struct nak_nir_attr_io_flags {
|
||||||
|
|
||||||
bool nak_nir_lower_vtg_io(nir_shader *nir, const struct nak_compiler *nak);
|
bool nak_nir_lower_vtg_io(nir_shader *nir, const struct nak_compiler *nak);
|
||||||
|
|
||||||
|
enum nak_interp_mode {
|
||||||
|
NAK_INTERP_MODE_PERSPECTIVE,
|
||||||
|
NAK_INTERP_MODE_SCREEN_LINEAR,
|
||||||
|
NAK_INTERP_MODE_CONSTANT,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum nak_interp_freq {
|
||||||
|
NAK_INTERP_FREQ_PASS,
|
||||||
|
NAK_INTERP_FREQ_CONSTANT,
|
||||||
|
NAK_INTERP_FREQ_STATE,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum nak_interp_loc {
|
||||||
|
NAK_INTERP_LOC_DEFAULT,
|
||||||
|
NAK_INTERP_LOC_CENTROID,
|
||||||
|
NAK_INTERP_LOC_OFFSET,
|
||||||
|
};
|
||||||
|
|
||||||
|
struct nak_nir_ipa_flags {
|
||||||
|
enum nak_interp_mode interp_mode:2;
|
||||||
|
enum nak_interp_freq interp_freq:2;
|
||||||
|
enum nak_interp_loc interp_loc:2;
|
||||||
|
uint32_t pad:26;
|
||||||
|
};
|
||||||
|
|
||||||
enum nak_fs_out {
|
enum nak_fs_out {
|
||||||
NAK_FS_OUT_COLOR0 = 0x00,
|
NAK_FS_OUT_COLOR0 = 0x00,
|
||||||
NAK_FS_OUT_COLOR1 = 0x10,
|
NAK_FS_OUT_COLOR1 = 0x10,
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue