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agx: switch to common LOD bias lowering

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only functional change is a slight instr count regression for cube map txd
because of pass ordering but lol.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34507>
This commit is contained in:
Alyssa Rosenzweig 2025-04-14 13:12:31 -04:00 • committed by Marge Bot
parent d53ad63c66
commit 618409a934
1 changed files with 1 additions and 87 deletions
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88
src/asahi/compiler/agx_nir_lower_texture.c
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@ -364,84 +364,6 @@ lower_regular_texture(nir_builder *b, nir_instr *instr, UNUSED void *data)
return true;
}
static nir_def *
bias_for_tex(nir_builder *b, nir_tex_instr *tex)
{
return nir_build_texture_query(b, tex, nir_texop_lod_bias, 1,
nir_type_float16, false, false);
}
static bool
lower_sampler_bias(nir_builder *b, nir_instr *instr, UNUSED void *data)
{
if (instr->type != nir_instr_type_tex)
return false;
nir_tex_instr *tex = nir_instr_as_tex(instr);
b->cursor = nir_before_instr(instr);
switch (tex->op) {
case nir_texop_tex: {
tex->op = nir_texop_txb;
nir_tex_instr_add_src(tex, nir_tex_src_bias, bias_for_tex(b, tex));
return true;
}
case nir_texop_txb:
case nir_texop_txl: {
nir_tex_src_type src =
tex->op == nir_texop_txl ? nir_tex_src_lod : nir_tex_src_bias;
nir_def *orig = nir_steal_tex_src(tex, src);
assert(orig != NULL && "invalid NIR");
if (orig->bit_size != 16)
orig = nir_f2f16(b, orig);
nir_tex_instr_add_src(tex, src, nir_fadd(b, orig, bias_for_tex(b, tex)));
return true;
}
case nir_texop_txd: {
/* For txd, the computed level-of-detail is log2(rho)
* where rho should scale proportionally to all
* derivatives. So scale derivatives by exp2(bias) to
* get level-of-detail log2(exp2(bias) * rho) = bias + log2(rho).
*/
nir_def *scale = nir_fexp2(b, nir_f2f32(b, bias_for_tex(b, tex)));
nir_tex_src_type src[] = {nir_tex_src_ddx, nir_tex_src_ddy};
for (unsigned s = 0; s < ARRAY_SIZE(src); ++s) {
nir_def *orig = nir_steal_tex_src(tex, src[s]);
assert(orig != NULL && "invalid");
nir_def *scaled = nir_fmul(b, nir_f2f32(b, orig), scale);
nir_tex_instr_add_src(tex, src[s], scaled);
}
return true;
}
case nir_texop_lod: {
nir_tex_instr_add_src(tex, nir_tex_src_bias, bias_for_tex(b, tex));
return true;
}
case nir_texop_txf:
case nir_texop_txf_ms:
case nir_texop_txs:
case nir_texop_tg4:
case nir_texop_texture_samples:
case nir_texop_samples_identical:
case nir_texop_query_levels:
/* These operations do not use a sampler */
return false;
default:
unreachable("Unhandled texture operation");
}
}
static bool
legalize_image_lod(nir_builder *b, nir_intrinsic_instr *intr, UNUSED void *data)
{
@ -776,6 +698,7 @@ agx_nir_lower_texture_early(nir_shader *s, bool support_lod_bias)
.lower_invalid_implicit_lod = true,
.lower_tg4_offsets = true,
.lower_index_to_offset = true,
.lower_sampler_lod_bias = support_lod_bias,
/* Unclear if/how mipmapped 1D textures work in the hardware. */
.lower_1d = true,
@ -787,15 +710,6 @@ agx_nir_lower_texture_early(nir_shader *s, bool support_lod_bias)
};
NIR_PASS(progress, s, nir_lower_tex, &lower_tex_options);
/* Lower bias after nir_lower_tex (to get rid of txd) but before
* lower_regular_texture (which will shuffle around the sources)
*/
if (support_lod_bias) {
NIR_PASS(progress, s, nir_shader_instructions_pass, lower_sampler_bias,
nir_metadata_control_flow, NULL);
}
return progress;
}