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intel/isl: Add MOCS settings for MTL platforms

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Add MOCS settings for Xe platforms based on cache settings for L3/L4
and display.

Rework:
 * Jordan: Use intel_device_info_is_mtl()

BSpec: 45101
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20045>
This commit is contained in:
Aditya Swarup 2022-02-02 18:01:12 -08:00 • committed by Jordan Justen
parent ea10b0fc7a
commit 6080dce4d8
1 changed files with 6 additions and 1 deletions
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7
src/intel/isl/isl.c
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@ -107,7 +107,12 @@ isl_device_setup_mocs(struct isl_device *dev)
dev->mocs.protected_mask = 0;
if (dev->info->ver >= 12) {
if (intel_device_info_is_dg2(dev->info)) {
if (intel_device_info_is_mtl(dev->info)) {
/* Cached L3+L4; BSpec: 45101 */
dev->mocs.internal = 1 << 1;
/* Displayables cached to L3+L4:WT */
dev->mocs.external = 14 << 1;
} else if (intel_device_info_is_dg2(dev->info)) {
/* L3CC=WB; BSpec: 45101 */
dev->mocs.internal = 3 << 1;
dev->mocs.external = 3 << 1;