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ir3/a6xx: fix ldg/stg of ulong2 and ulong4 data
Partially revert the commit f4c9e9329c ("ir3/a6xx: Fix immediate
offset stg/ldg path").
There is no need to multiply the immediate offsets by 4. Doing so
results in loading and/or storing the data at wrong locations.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26817>
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parent
3f25a73f17
commit
60686d4146
1 changed files with 2 additions and 2 deletions
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@ -343,7 +343,7 @@ emit_intrinsic_load_global_ir3(struct ir3_context *ctx,
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nir_src_as_int(intr->src[1]) > -(1 << 10);
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if (const_offset_in_bounds) {
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load = ir3_LDG(b, addr, 0, create_immed(b, nir_src_as_int(intr->src[1]) * 4),
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load = ir3_LDG(b, addr, 0, create_immed(b, nir_src_as_int(intr->src[1])),
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0, create_immed(b, dest_components), 0);
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} else {
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offset = ir3_get_src(ctx, &intr->src[1])[0];
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@ -386,7 +386,7 @@ emit_intrinsic_store_global_ir3(struct ir3_context *ctx,
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if (const_offset_in_bounds) {
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stg = ir3_STG(b, addr, 0,
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create_immed(b, nir_src_as_int(intr->src[2]) * 4), 0,
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create_immed(b, nir_src_as_int(intr->src[2])), 0,
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value, 0,
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create_immed(b, ncomp), 0);
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} else {
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