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radeonsi: disable perfect ZPASS counts for PIPE_QUERY_OCCLUSION_PREDICATE

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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2016-04-07 02:27:01 +02:00
parent baa0b3f4cc
commit 5fac4887d8
3 changed files with 17 additions and 6 deletions
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3
src/gallium/drivers/radeon/r600_pipe_common.h
View file

@ -425,8 +425,9 @@ struct r600_common_context {
unsigned flags; /* flush flags */
/* Queries. */
/* The list of active queries. Only one query of each type can be active. */
/* The list of active queries. */
int num_occlusion_queries;
int num_perfect_occlusion_queries;
/* Keep track of non-timer queries, because they should be suspended
* during context flushing.
* The timer queries (TIME_ELAPSED) shouldn't be suspended for blits,

14
src/gallium/drivers/radeon/r600_query.c
View file

@ -414,14 +414,22 @@ static void r600_update_occlusion_query_state(struct r600_common_context *rctx,
if (type == PIPE_QUERY_OCCLUSION_COUNTER ||
type == PIPE_QUERY_OCCLUSION_PREDICATE) {
bool old_enable = rctx->num_occlusion_queries != 0;
bool enable;
bool old_perfect_enable =
rctx->num_perfect_occlusion_queries != 0;
bool enable, perfect_enable;
rctx->num_occlusion_queries += diff;
assert(rctx->num_occlusion_queries >= 0);
enable = rctx->num_occlusion_queries != 0;
if (type == PIPE_QUERY_OCCLUSION_COUNTER) {
rctx->num_perfect_occlusion_queries += diff;
assert(rctx->num_perfect_occlusion_queries >= 0);
}
if (enable != old_enable) {
enable = rctx->num_occlusion_queries != 0;
perfect_enable = rctx->num_perfect_occlusion_queries != 0;
if (enable != old_enable || perfect_enable != old_perfect_enable) {
rctx->set_occlusion_query_state(&rctx->b, enable);
}
}

6
src/gallium/drivers/radeonsi/si_state.c
View file

@ -1310,16 +1310,18 @@ static void si_emit_db_render_state(struct si_context *sctx, struct r600_atom *s
/* DB_COUNT_CONTROL (occlusion queries) */
if (sctx->b.num_occlusion_queries > 0) {
bool perfect = sctx->b.num_perfect_occlusion_queries > 0;
if (sctx->b.chip_class >= CIK) {
radeon_emit(cs,
S_028004_PERFECT_ZPASS_COUNTS(1) |
S_028004_PERFECT_ZPASS_COUNTS(perfect) |
S_028004_SAMPLE_RATE(sctx->framebuffer.log_samples) |
S_028004_ZPASS_ENABLE(1) |
S_028004_SLICE_EVEN_ENABLE(1) |
S_028004_SLICE_ODD_ENABLE(1));
} else {
radeon_emit(cs,
S_028004_PERFECT_ZPASS_COUNTS(1) |
S_028004_PERFECT_ZPASS_COUNTS(perfect) |
S_028004_SAMPLE_RATE(sctx->framebuffer.log_samples));
}
} else {