pvr, pco: alpha to coverage support

Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412>

src/compiler/nir/nir_intrinsics.py

@@ -2744,3 +2744,5 @@ system_value("fs_meta_pco", 1, bit_sizes=[32])
 intrinsic("flush_tile_buffer_pco", src_comp=[1, 1])
 
 intrinsic("dummy_load_store_pco", indices=[BASE])
+
+intrinsic("alpha_to_coverage_pco", src_comp=[1], dest_comp=1, flags=[CAN_REORDER], bit_sizes=[32])

src/imagination/pco/pco_data.h

@@ -113,6 +113,7 @@ typedef struct _pco_fs_data {
       bool discard;
       bool early_frag;
       bool sample_shading;
+      bool alpha_to_coverage;
    } uses;
 
    struct {

src/imagination/pco/pco_internal.h

@@ -1683,6 +1683,7 @@ bool pco_nir_compute_instance_check(nir_shader *shader);
 bool pco_nir_link_clip_cull_vars(nir_shader *producer, nir_shader *consumer);
 bool pco_nir_lower_algebraic(nir_shader *shader);
 bool pco_nir_lower_algebraic_late(nir_shader *shader);
+bool pco_nir_lower_alpha_to_coverage(nir_shader *shader);
 bool pco_nir_lower_atomics(nir_shader *shader, bool *uses_usclib);
 bool pco_nir_lower_barriers(nir_shader *shader, bool *uses_usclib);
 bool pco_nir_lower_clip_cull_vars(nir_shader *shader);

src/imagination/pco/pco_nir.c

@@ -790,6 +790,9 @@ void pco_lower_nir(pco_ctx *ctx, nir_shader *nir, pco_data *data)
    NIR_PASS(_, nir, pco_nir_lower_tex);
 
    if (nir->info.stage == MESA_SHADER_FRAGMENT) {
+      if (data->fs.uses.alpha_to_coverage)
+         NIR_PASS(_, nir, pco_nir_lower_alpha_to_coverage);
+
       bool backup = nir->info.fs.uses_sample_shading;
       NIR_PASS(_, nir, nir_lower_blend, &data->fs.blend_opts);
       nir->info.fs.uses_sample_shading = backup;

src/imagination/pco/pco_nir_pvfio.c

@@ -1086,6 +1086,57 @@ static bool z_replicate(nir_shader *shader, struct pfo_state *state)
    return true;
 }
 
+static bool is_frag_color_out(const nir_instr *instr,
+                              UNUSED const void *cb_data)
+{
+   if (instr->type != nir_instr_type_intrinsic)
+      return false;
+
+   nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
+   if (intr->intrinsic != nir_intrinsic_store_output)
+      return false;
+
+   gl_frag_result location = nir_intrinsic_io_semantics(intr).location;
+   return location >= FRAG_RESULT_DATA0 && location < FRAG_RESULT_MAX;
+}
+
+static nir_def *
+lower_alpha_to_coverage(nir_builder *b, nir_instr *instr, UNUSED void *cb_data)
+{
+   nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
+
+   /* "If multiple output colors, alpha for a2c is output color 0." */
+   nir_io_semantics io_sem = nir_intrinsic_io_semantics(intr);
+   if (io_sem.location != FRAG_RESULT_DATA0)
+      return NULL;
+
+   nir_def *input = intr->src[0].ssa;
+   b->cursor = nir_before_instr(&intr->instr);
+   nir_def *alpha = input->num_components < 4 ? nir_imm_float(b, 1.0f)
+                                              : nir_channel(b, input, 3);
+
+   nir_def *a2c_mask = nir_alpha_to_coverage_pco(b, alpha);
+
+   a2c_mask = nir_iand(b, a2c_mask, nir_load_savmsk_vm_pco(b));
+
+   a2c_mask = nir_iand(b,
+                       a2c_mask,
+                       nir_ishl(b, nir_imm_int(b, 1), nir_load_sample_id(b)));
+
+   nir_terminate_if(b, nir_ieq_imm(b, a2c_mask, 0));
+
+   return NULL;
+}
+
+bool pco_nir_lower_alpha_to_coverage(nir_shader *shader)
+{
+   assert(shader->info.stage == MESA_SHADER_FRAGMENT);
+   return nir_shader_lower_instructions(shader,
+                                        is_frag_color_out,
+                                        lower_alpha_to_coverage,
+                                        NULL);
+}
+
 static bool is_load_sample_mask(const nir_instr *instr,
                                 UNUSED const void *cb_data)
 {

src/imagination/pco/pco_trans_nir.c

@@ -1620,6 +1620,11 @@ static pco_instr *trans_intr(trans_ctx *tctx, nir_intrinsic_instr *intr)
       break;
    }
 
+   case nir_intrinsic_alpha_to_coverage_pco:
+      assert(tctx->stage == MESA_SHADER_FRAGMENT);
+      instr = pco_pck(&tctx->b, dest, src[0], .pck_fmt = PCO_PCK_FMT_COV);
+      break;
+
    case nir_intrinsic_mutex_pco:
       instr = pco_mutex(&tctx->b,
                         pco_ref_imm8(nir_intrinsic_mutex_id_pco(intr)),

src/imagination/vulkan/pvr_pipeline.c

@@ -2402,6 +2402,8 @@ pvr_preprocess_shader_data(pco_data *data,
       pvr_init_fs_blend(data, state->cb);
       pvr_init_fs_tile_buffers(data);
 
+      data->fs.uses.alpha_to_coverage = state->ms->alpha_to_coverage_enable;
+
       if (BITSET_TEST(state->dynamic, MESA_VK_DYNAMIC_MS_SAMPLE_MASK) ||
           (state->ms && state->ms->sample_mask != 0xffff)) {
          data->fs.meta_present.sample_mask = true;