From 5f89ce8799541ead0f20182fe25e8bef44f54dd9 Mon Sep 17 00:00:00 2001 From: Danylo Piliaiev Date: Wed, 19 Apr 2023 19:08:00 +0200 Subject: [PATCH] ir3/a7xx: Don't multiply global mem instruction's offset by 4 a7xx global memory instructions don't have implied shift. Signed-off-by: Danylo Piliaiev Part-of: --- src/freedreno/ir3/ir3_a6xx.c | 8 ++++++++ src/freedreno/ir3/ir3_parser.y | 5 ++++- src/freedreno/isa/ir3-cat6.xml | 6 +++--- 3 files changed, 15 insertions(+), 4 deletions(-) diff --git a/src/freedreno/ir3/ir3_a6xx.c b/src/freedreno/ir3/ir3_a6xx.c index 6ed32dc2a8f..1592a56a397 100644 --- a/src/freedreno/ir3/ir3_a6xx.c +++ b/src/freedreno/ir3/ir3_a6xx.c @@ -347,6 +347,10 @@ emit_intrinsic_load_global_ir3(struct ir3_context *ctx, 0, create_immed(b, dest_components), 0); } else { offset = ir3_get_src(ctx, &intr->src[1])[0]; + if (ctx->compiler->gen >= 7) { + /* A7XX TODO: Move to NIR for it to be properly optimized? */ + offset = ir3_SHL_B(b, offset, 0, create_immed(b, 2), 0); + } load = ir3_LDG_A(b, addr, 0, offset, 0, create_immed(b, 0), 0, create_immed(b, 0), 0, create_immed(b, dest_components), 0); @@ -387,6 +391,10 @@ emit_intrinsic_store_global_ir3(struct ir3_context *ctx, create_immed(b, ncomp), 0); } else { offset = ir3_get_src(ctx, &intr->src[2])[0]; + if (ctx->compiler->gen >= 7) { + /* A7XX TODO: Move to NIR for it to be properly optimized? */ + offset = ir3_SHL_B(b, offset, 0, create_immed(b, 2), 0); + } stg = ir3_STG_A(b, addr, 0, offset, 0, create_immed(b, 0), 0, create_immed(b, 0), 0, value, 0, create_immed(b, ncomp), 0); diff --git a/src/freedreno/ir3/ir3_parser.y b/src/freedreno/ir3/ir3_parser.y index 431995c0696..f975eadae4e 100644 --- a/src/freedreno/ir3/ir3_parser.y +++ b/src/freedreno/ir3/ir3_parser.y @@ -1138,7 +1138,10 @@ cat6_a6xx_global_address_pt3: new_src(0, IR3_REG_IMMED)->uim_val = $3 - 2; new_src(0, IR3_REG_IMMED)->uim_val = $4; } -| '+' cat6_reg_or_immed +| '+' cat6_reg_or_immed { + // Dummy src to smooth the difference between a6xx and a7xx + new_src(0, IR3_REG_IMMED)->uim_val = 0; + } cat6_a6xx_global_address_pt2: '(' src offset ')' '<' '<' integer { diff --git a/src/freedreno/isa/ir3-cat6.xml b/src/freedreno/isa/ir3-cat6.xml index 4f4a6eedcb0..e9b75a71072 100644 --- a/src/freedreno/isa/ir3-cat6.xml +++ b/src/freedreno/isa/ir3-cat6.xml @@ -144,7 +144,7 @@ SOFTWARE. src->srcs[1] extract_reg_uim(src->srcs[2]) - extract_reg_uim(src->srcs[3]) + extract_reg_uim(src->srcs[4]) !!(src->srcs[0]->flags & IR3_REG_CONST) @@ -256,8 +256,8 @@ SOFTWARE. src->srcs[1] extract_reg_uim(src->srcs[2]) - src->srcs[3] - extract_reg_uim(src->srcs[4]) + src->srcs[4] + extract_reg_uim(src->srcs[5]) !!(src->srcs[0]->flags & IR3_REG_CONST)