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nir: Add ability to lower non-const quad broadcasts to const ones.

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Some hardware doesn't support subgroup shuffle, and on such hardware
it makes no sense to lower quad broadcasts to shuffle. Instead, let's
lower them to four const quad broadcasts, paired with bcsel instructions.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4147>
(cherry picked from commit ec16535b49)
This commit is contained in:
Timur Kristóf 2020-03-11 15:01:56 +01:00 • committed by Dylan Baker
parent a8fa654cbe
commit 5f896ad529
3 changed files with 43 additions and 2 deletions
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2
.pick_status.json
View file

@ -499,7 +499,7 @@
"description": "nir: Add ability to lower non-const quad broadcasts to const ones.",
"nominated": true,
"nomination_type": 0,
"resolution": 0,
"resolution": 1,
"master_sha": null,
"because_sha": null
},

1
src/compiler/nir/nir.h
View file

@ -3881,6 +3881,7 @@ typedef struct nir_lower_subgroups_options {
bool lower_shuffle_to_32bit:1;
bool lower_quad:1;
bool lower_quad_broadcast_dynamic:1;
bool lower_quad_broadcast_dynamic_to_const:1;
} nir_lower_subgroups_options;
bool nir_lower_subgroups(nir_shader *shader,

42
src/compiler/nir/nir_lower_subgroups.c
View file

@ -301,6 +301,46 @@ build_subgroup_mask(nir_builder *b, unsigned bit_size,
nir_load_subgroup_size(b)));
}
static nir_ssa_def *
lower_dynamic_quad_broadcast(nir_builder *b, nir_intrinsic_instr *intrin,
const nir_lower_subgroups_options *options)
{
if (!options->lower_quad_broadcast_dynamic_to_const)
return lower_shuffle(b, intrin, options->lower_to_scalar, false);
nir_ssa_def *dst = NULL;
for (unsigned i = 0; i < 4; ++i) {
nir_intrinsic_instr *qbcst =
nir_intrinsic_instr_create(b->shader, nir_intrinsic_quad_broadcast);
qbcst->num_components = intrin->num_components;
qbcst->src[1] = nir_src_for_ssa(nir_imm_int(b, i));
nir_src_copy(&qbcst->src[0], &intrin->src[0], qbcst);
nir_ssa_dest_init(&qbcst->instr, &qbcst->dest,
intrin->dest.ssa.num_components,
intrin->dest.ssa.bit_size, NULL);
nir_ssa_def *qbcst_dst = NULL;
if (options->lower_to_scalar && qbcst->num_components > 1) {
qbcst_dst = lower_subgroup_op_to_scalar(b, qbcst, false);
} else {
nir_builder_instr_insert(b, &qbcst->instr);
qbcst_dst = &qbcst->dest.ssa;
}
if (i)
dst = nir_bcsel(b, nir_ieq(b, intrin->src[1].ssa,
nir_src_for_ssa(nir_imm_int(b, i)).ssa),
qbcst_dst, dst);
else
dst = qbcst_dst;
}
return dst;
}
static nir_ssa_def *
lower_subgroups_instr(nir_builder *b, nir_instr *instr, void *_options)
{
@ -477,7 +517,7 @@ lower_subgroups_instr(nir_builder *b, nir_instr *instr, void *_options)
(options->lower_quad_broadcast_dynamic &&
intrin->intrinsic == nir_intrinsic_quad_broadcast &&
!nir_src_is_const(intrin->src[1])))
return lower_shuffle(b, intrin, options->lower_to_scalar, false);
return lower_dynamic_quad_broadcast(b, intrin, options);
else if (options->lower_to_scalar && intrin->num_components > 1)
return lower_subgroup_op_to_scalar(b, intrin, false);
break;