From 5f53e6edc00553ce3af16d0fe2fed126002c4420 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Thu, 30 Oct 2025 14:45:23 -0400 Subject: [PATCH] intel: use util_is_aligned more Coccinelle + filtering hunks manually. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Caio Oliveira Reviewed-by: Mary Guillemard Acked-by: Yonggang Luo Part-of: --- src/gallium/drivers/iris/iris_state.c | 2 +- src/intel/blorp/blorp_genX_exec_brw.h | 2 +- src/intel/blorp/blorp_priv.h | 4 ++-- src/intel/compiler/brw/brw_eu_emit.c | 2 +- src/intel/compiler/brw/brw_reg.h | 2 +- src/intel/isl/isl_tiled_memcpy.c | 4 ++-- src/intel/vulkan/anv_descriptor_set.c | 4 ++-- src/intel/vulkan/anv_image_view.c | 2 +- 8 files changed, 11 insertions(+), 11 deletions(-) diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 5ff05c34f24..9e275b47188 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -5970,7 +5970,7 @@ pin_scratch_space(struct iris_context *ice, scratch_addr = ref->offset + iris_resource_bo(ref->res)->address - IRIS_MEMZONE_SCRATCH_START; - assert((scratch_addr & 0x3f) == 0 && scratch_addr < (1 << 26)); + assert(util_is_aligned(scratch_addr, 64) && scratch_addr < (1 << 26)); #else scratch_addr = scratch_bo->address; #endif diff --git a/src/intel/blorp/blorp_genX_exec_brw.h b/src/intel/blorp/blorp_genX_exec_brw.h index 9ea5ddc8f1e..76617fd02a6 100644 --- a/src/intel/blorp/blorp_genX_exec_brw.h +++ b/src/intel/blorp/blorp_genX_exec_brw.h @@ -1265,7 +1265,7 @@ blorp_emit_surface_state(struct blorp_batch *batch, if (aux_usage != ISL_AUX_USAGE_NONE && surface->clear_color_addr.buffer) { #if GFX_VER >= 10 - assert((surface->clear_color_addr.offset & 0x3f) == 0); + assert(util_is_aligned(surface->clear_color_addr.offset, 64)); uint32_t *clear_addr = state + isl_dev->ss.clear_color_state_offset; blorp_surface_reloc(batch, state_offset + isl_dev->ss.clear_color_state_offset, diff --git a/src/intel/blorp/blorp_priv.h b/src/intel/blorp/blorp_priv.h index 3c74cfa6bca..e8446721ddd 100644 --- a/src/intel/blorp/blorp_priv.h +++ b/src/intel/blorp/blorp_priv.h @@ -474,9 +474,9 @@ blorp_get_cs_local_y(struct blorp_params *params) { uint32_t height = params->y1 - params->y0; uint32_t or_ys = params->y0 | params->y1; - if (height > 32 || (or_ys & 3) == 0) { + if (height > 32 || util_is_aligned(or_ys, 4)) { return 4; - } else if ((or_ys & 1) == 0) { + } else if (util_is_aligned(or_ys, 2)) { return 2; } else { return 1; diff --git a/src/intel/compiler/brw/brw_eu_emit.c b/src/intel/compiler/brw/brw_eu_emit.c index 95ddc409b0c..66762b61e35 100644 --- a/src/intel/compiler/brw/brw_eu_emit.c +++ b/src/intel/compiler/brw/brw_eu_emit.c @@ -1528,7 +1528,7 @@ brw_send_indirect_split_message(struct brw_codegen *p, brw_eu_inst_set_sends_ex_desc(devinfo, send, ex_desc.ud, gather); } else { assert(ex_desc.file == ADDRESS); - assert((ex_desc.subnr & 0x3) == 0); + assert(util_is_aligned(ex_desc.subnr, 4)); brw_eu_inst_set_send_sel_reg32_ex_desc(devinfo, send, 1); brw_eu_inst_set_send_ex_desc_ia_subreg_nr(devinfo, send, phys_subnr(devinfo, ex_desc) >> 2); diff --git a/src/intel/compiler/brw/brw_reg.h b/src/intel/compiler/brw/brw_reg.h index fef46596d5e..1d71b05c746 100644 --- a/src/intel/compiler/brw/brw_reg.h +++ b/src/intel/compiler/brw/brw_reg.h @@ -1080,7 +1080,7 @@ brw_uniform_reg(unsigned nr, enum brw_reg_type type) static inline bool brw_reg_is_arf(struct brw_reg reg, unsigned arf) { - assert((arf & 0x0f) == 0 && arf <= BRW_ARF_TIMESTAMP); + assert(util_is_aligned(arf, 16) && arf <= BRW_ARF_TIMESTAMP); return reg.file == ARF && (reg.nr & 0xF0) == arf; } diff --git a/src/intel/isl/isl_tiled_memcpy.c b/src/intel/isl/isl_tiled_memcpy.c index 5b2f0d684d8..d93bf1ed76d 100644 --- a/src/intel/isl/isl_tiled_memcpy.c +++ b/src/intel/isl/isl_tiled_memcpy.c @@ -357,7 +357,7 @@ rgba8_copy_16_aligned_src(void *dst, const void *src) static inline void * rgba8_copy_aligned_dst(void *dst, const void *src, size_t bytes) { - assert(bytes == 0 || !(((uintptr_t)dst) & 0xf)); + assert(bytes == 0 || util_ptr_is_aligned(dst, 16)); #if defined(__SSSE3__) || defined(__SSE2__) if (bytes == 64) { @@ -387,7 +387,7 @@ rgba8_copy_aligned_dst(void *dst, const void *src, size_t bytes) static inline void * rgba8_copy_aligned_src(void *dst, const void *src, size_t bytes) { - assert(bytes == 0 || !(((uintptr_t)src) & 0xf)); + assert(bytes == 0 || util_ptr_is_aligned(src, 16)); #if defined(__SSSE3__) || defined(__SSE2__) if (bytes == 64) { diff --git a/src/intel/vulkan/anv_descriptor_set.c b/src/intel/vulkan/anv_descriptor_set.c index c65d506502b..4672b530a36 100644 --- a/src/intel/vulkan/anv_descriptor_set.c +++ b/src/intel/vulkan/anv_descriptor_set.c @@ -1953,10 +1953,10 @@ anv_surface_state_to_handle(struct anv_physical_device *device, assert(state.offset >= 0); uint32_t offset = state.offset; if (device->uses_ex_bso) { - assert((offset & 0x3f) == 0); + assert(util_is_aligned(offset, 64)); return offset; } else { - assert((offset & 0x3f) == 0 && offset < (1 << 26)); + assert(util_is_aligned(offset, 64) && offset < (1 << 26)); return offset << 6; } } diff --git a/src/intel/vulkan/anv_image_view.c b/src/intel/vulkan/anv_image_view.c index b1f9f4f811d..4174882f9eb 100644 --- a/src/intel/vulkan/anv_image_view.c +++ b/src/intel/vulkan/anv_image_view.c @@ -150,7 +150,7 @@ anv_image_fill_surface_state(struct anv_device *device, if (device->info->ver >= 10 && clear_address.bo) { uint32_t *clear_addr_dw = surface_state_map + device->isl_dev.ss.clear_color_state_offset; - assert((clear_address.offset & 0x3f) == 0); + assert(util_is_aligned(clear_address.offset, 64)); state_inout->clear_address.offset |= *clear_addr_dw & 0x3f; }