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nv50/ir: handle new DDIV op which will be used for double divisions

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The existing lowering is in place to lower that to RCP + MUL, or fancier
things down the line if necessary.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Ilia Mirkin 2017-01-16 14:25:15 -05:00
parent 6be4a40430
commit 5eeebca12f
1 changed files with 3 additions and 0 deletions
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3
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
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@ -612,6 +612,7 @@ nv50_ir::DataType Instruction::inferSrcType() const
case TGSI_OPCODE_DNEG:
case TGSI_OPCODE_DADD:
case TGSI_OPCODE_DMUL:
case TGSI_OPCODE_DDIV:
case TGSI_OPCODE_DMAX:
case TGSI_OPCODE_DMIN:
case TGSI_OPCODE_DSLT:
@ -810,6 +811,7 @@ static nv50_ir::operation translateOpcode(uint opcode)
NV50_IR_OPCODE_CASE(DNEG, NEG);
NV50_IR_OPCODE_CASE(DADD, ADD);
NV50_IR_OPCODE_CASE(DMUL, MUL);
NV50_IR_OPCODE_CASE(DDIV, DIV);
NV50_IR_OPCODE_CASE(DMAX, MAX);
NV50_IR_OPCODE_CASE(DMIN, MIN);
NV50_IR_OPCODE_CASE(DSLT, SET);
@ -3745,6 +3747,7 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
}
case TGSI_OPCODE_DADD:
case TGSI_OPCODE_DMUL:
case TGSI_OPCODE_DDIV:
case TGSI_OPCODE_DMAX:
case TGSI_OPCODE_DMIN:
FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {