fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-27 08:20:12 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

brw: always write the VUE header

Browse source 
In 35df3925ca ("brw: ensure VUE header writes in HS/DS/GS stages") I
misread the PRMs and thought that the VF would initialize the header.

What actually happens is that the VF does not write valid values in
there and the PRMs explicitly say that the VS shader should overwrite
whatever is in there.

We could avoid writing the header in some cases when no HW is going to
read back the header. For example with rendering disables through
3DSTATE_STREAMOUT::RenderingDisable. But those cases are dynamic and
the compiler is not able to tell. So just always write the header.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 35df3925ca ("brw: ensure VUE header writes in HS/DS/GS stages")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12880
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34211>
(cherry picked from commit 4db4bd1d04)
This commit is contained in:
Lionel Landwerlin 2025-03-26 14:32:28 +02:00 • committed by Eric Engestrom
parent 9acee7d46b
commit 5ecc1fb189
2 changed files with 7 additions and 16 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
.pick_status.json
View file

@ -2484,7 +2484,7 @@
"description": "brw: always write the VUE header",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "35df3925ca0fe5e78c24b12f34c6a1afce08ed7a",
"notes": null

21
src/intel/compiler/brw_fs_visitor.cpp
View file

@ -43,8 +43,6 @@ fs_visitor::emit_urb_writes(const brw_reg &gs_vertex_count)
int starting_urb_offset = 0;
const struct brw_vue_prog_data *vue_prog_data =
brw_vue_prog_data(this->prog_data);
const GLbitfield64 psiz_mask =
VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT | VARYING_BIT_PSIZ | VARYING_BIT_PRIMITIVE_SHADING_RATE;
const struct intel_vue_map *vue_map = &vue_prog_data->vue_map;
bool flush;
brw_reg sources[8];
@ -122,12 +120,12 @@ fs_visitor::emit_urb_writes(const brw_reg &gs_vertex_count)
switch (varying) {
case VARYING_SLOT_PSIZ: {
/* The point size varying slot is the vue header and is always in the
* vue map. But often none of the special varyings that live there
* are written and for the vertex shaders we can skip writing to the
* VUE header because it is setup by the VF fixed function. All other
* pre-rasterization stages should setup the VUE header properly as
* describe in the SKL PRMs, Volume 7: 3D-Media-GPGPU, Vertex URB
* Entry (VUE) Formats:
* vue map. If anything in the header is going to be read back by HW,
* we need to initialize it, in particular the viewport & layer
* values.
*
* SKL PRMs, Volume 7: 3D-Media-GPGPU, Vertex URB Entry (VUE)
* Formats:
*
* "VUEs are written in two ways:
*
@ -156,13 +154,6 @@ fs_visitor::emit_urb_writes(const brw_reg &gs_vertex_count)
* - If Rendering is disabled, VertexHeaders are not required
* anywhere."
*/
if ((vue_map->slots_valid & psiz_mask) == 0 &&
stage == MESA_SHADER_VERTEX) {
assert(length == 0);
urb_offset++;
break;
}
brw_reg zero = brw_vgrf(alloc.allocate(dispatch_width / 8),
BRW_TYPE_UD);
bld.MOV(zero, brw_imm_ud(0u));