fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-23 22:00:13 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

radv: add support for fast-clearing DCC layers on GFX9+

Browse source 
Layers are contiguous in memory.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8368>
This commit is contained in:
Samuel Pitoiset 2021-01-07 16:18:03 +01:00 • committed by Marge Bot
parent 7a3e6f5ac2
commit 5e8f6967b1
1 changed files with 4 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
src/amd/vulkan/radv_meta_clear.c
View file

@ -1401,6 +1401,7 @@ radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
const VkImageSubresourceRange *range, uint32_t value) const VkImageSubresourceRange *range, uint32_t value)
{ {
uint32_t level_count = radv_get_levelCount(image, range); uint32_t level_count = radv_get_levelCount(image, range);
uint32_t layer_count = radv_get_layerCount(image, range);
uint32_t flush_bits = 0; uint32_t flush_bits = 0;
/* Mark the image as being compressed. */ /* Mark the image as being compressed. */
@ -1414,7 +1415,9 @@ radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) { if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
/* Mipmap levels aren't implemented. */ /* Mipmap levels aren't implemented. */
assert(level == 0); assert(level == 0);
size = image->planes[0].surface.dcc_size;
offset += image->planes[0].surface.dcc_slice_size * range->baseArrayLayer;
size = image->planes[0].surface.dcc_slice_size * layer_count;
} else { } else {
const struct legacy_surf_level *surf_level = const struct legacy_surf_level *surf_level =
&image->planes[0].surface.u.legacy.level[level]; &image->planes[0].surface.u.legacy.level[level];