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r600g: 128 bit formats require tile_type = 1 on cayman

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Noticed by taiu on IRC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Note: this is a candidate for the stable branches.
This commit is contained in:
Alex Deucher 2012-02-10 11:02:03 -05:00
parent acca690c25
commit 5e1495b2d9
1 changed files with 10 additions and 0 deletions
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10
src/gallium/drivers/r600/evergreen_state.c
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@ -1174,6 +1174,11 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
bankw = eg_bank_wh(bankw);
bankh = eg_bank_wh(bankh);
}
/* 128 bit formats require tile type = 1 */
if (rscreen->chip_class == CAYMAN) {
if (util_format_get_blocksize(state->format) >= 16)
tile_type = 1;
}
nbanks = eg_num_banks(rscreen->tiling_info.num_banks);
if (texture->target == PIPE_TEXTURE_1D_ARRAY) {
@ -1511,6 +1516,11 @@ static void evergreen_cb(struct r600_context *rctx, struct r600_pipe_state *rsta
bankw = eg_bank_wh(bankw);
bankh = eg_bank_wh(bankh);
}
/* 128 bit formats require tile type = 1 */
if (rscreen->chip_class == CAYMAN) {
if (util_format_get_blocksize(surf->base.format) >= 16)
tile_type = 1;
}
nbanks = eg_num_banks(rscreen->tiling_info.num_banks);
desc = util_format_description(surf->base.format);
for (i = 0; i < 4; i++) {