fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-06 11:38:05 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

FBO Checkpoint:

Browse source 
Basic FBO hardware rendering now working (fbotest1.c works at least).
This commit is contained in:
Brian Paul 2006-03-19 00:05:55 +00:00
parent 6734bab3b2
commit 5df4283b53
4 changed files with 63 additions and 11 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
src/mesa/drivers/dri/i915/i915_state.c
View file

@ -856,12 +856,14 @@ static void i915_init_packets( struct i915_context *i915 )
{
I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
i915->state.Buffer[I915_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
/* XXX FBO: remove this? Also get set in i915_set_draw_region() */
i915->state.Buffer[I915_DESTREG_CBUFADDR1] =
(BUF_3D_ID_COLOR_BACK |
BUF_3D_PITCH(screen->front.pitch * screen->cpp) | /* XXX FBO fix */
BUF_3D_USE_FENCE);
i915->state.Buffer[I915_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
/* XXX FBO: remove this? Also get set in i915_set_draw_region() */
i915->state.Buffer[I915_DESTREG_DBUFADDR1] =
(BUF_3D_ID_DEPTH |
BUF_3D_PITCH(screen->depth.pitch * screen->cpp) | /* XXX FBO fix */
@ -869,6 +871,7 @@ static void i915_init_packets( struct i915_context *i915 )
i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
/* XXX FBO: remove this? Also get set in i915_set_draw_region() */
switch (screen->fbFormat) {
case DV_PF_565:
i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */

48
src/mesa/drivers/dri/i915/i915_vtbl.c
View file

@ -244,7 +244,6 @@ static void i915_emit_state( struct intel_context *intel )
if (dirty & I915_UPLOAD_BUFFERS) {
if (INTEL_DEBUG & DEBUG_STATE) fprintf(stderr, "I915_UPLOAD_BUFFERS:\n");
BEGIN_BATCH(I915_DEST_SETUP_SIZE+2, 0);
OUT_BATCH(state->Buffer[I915_DESTREG_CBUFADDR0]);
OUT_BATCH(state->Buffer[I915_DESTREG_CBUFADDR1]);
@ -342,17 +341,64 @@ static void i915_destroy_context( struct intel_context *intel )
_tnl_free_vertices(&intel->ctx);
}
/**
* Set the drawing regions for the color and depth/stencil buffers.
* This involves setting the pitch, cpp and buffer ID/location.
* Also set pixel format for color and Z rendering
*/
static void i915_set_draw_region( struct intel_context *intel,
struct intel_region *draw_region,
struct intel_region *depth_region)
{
struct i915_context *i915 = i915_context(&intel->ctx);
GLuint value;
intel_region_release(intel, &i915->state.draw_region);
intel_region_release(intel, &i915->state.depth_region);
intel_region_reference(&i915->state.draw_region, draw_region);
intel_region_reference(&i915->state.depth_region, depth_region);
/*
* Set stride/cpp values
*/
if (draw_region) {
i915->state.Buffer[I915_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
i915->state.Buffer[I915_DESTREG_CBUFADDR1] =
(BUF_3D_ID_COLOR_BACK |
BUF_3D_PITCH(draw_region->pitch * draw_region->cpp) |
BUF_3D_USE_FENCE);
}
if (depth_region) {
i915->state.Buffer[I915_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
i915->state.Buffer[I915_DESTREG_DBUFADDR1] =
(BUF_3D_ID_DEPTH |
BUF_3D_PITCH(depth_region->pitch * depth_region->cpp) |
BUF_3D_USE_FENCE);
}
/*
* Compute/set I915_DESTREG_DV1 value
*/
value = (DSTORG_HORT_BIAS(0x8) | /* .5 */
DSTORG_VERT_BIAS(0x8) | /* .5 */
LOD_PRECLAMP_OGL |
TEX_DEFAULT_COLOR_OGL);
if (draw_region && draw_region->cpp == 4) {
value |= DV_PF_8888;
}
else {
value |= (DITHER_FULL_ALWAYS | DV_PF_565);
}
if (depth_region && depth_region->cpp == 4) {
value |= DEPTH_FRMT_24_FIXED_8_OTHER;
}
else {
value |= DEPTH_FRMT_16_FIXED;
}
i915->state.Buffer[I915_DESTREG_DV1] = value;
I915_STATECHANGE( i915, I915_UPLOAD_BUFFERS );
}

6
src/mesa/drivers/dri/i915/intel_buffers.c
View file

@ -133,6 +133,8 @@ static void intelBufferSize(GLframebuffer *buffer,
*/
static void intelSetRenderbufferClipRects( struct intel_context *intel )
{
ASSERT(intel->ctx.DrawBuffer->Width > 0);
ASSERT(intel->ctx.DrawBuffer->Height > 0);
intel->fboRect.x1 = 0;
intel->fboRect.y1 = 0;
intel->fboRect.x2 = intel->ctx.DrawBuffer->Width;
@ -556,15 +558,17 @@ intelDrawBuffer(GLcontext *ctx, GLenum mode )
return;
}
/* XXX FBO: Should probably move this into core Mesa */
if (ctx->NewState & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) {
_mesa_update_framebuffer(ctx);
_mesa_update_draw_buffer_bounds(ctx);
}
/*
* How many color buffers are we drawing into?
*/
if (ctx->DrawBuffer->_NumColorDrawBuffers[0] != 1
#if 1
#if 0
/* XXX FBO temporary - always use software rendering */
|| ctx->DrawBuffer->Name != 0
#endif

17
src/mesa/drivers/dri/i915/intel_fbo.c
View file

@ -138,33 +138,33 @@ intel_alloc_storage(GLcontext *ctx, struct gl_renderbuffer *rb,
switch (format) {
case GL_RGB:
case GL_RGBA:
internalFormat = GL_RGBA8;
rb->InternalFormat = GL_RGBA8;
rb->DataType = GL_UNSIGNED_BYTE;
rb->RedBits = 8;
rb->GreenBits = 8;
rb->BlueBits = 8;
rb->AlphaBits = 8;
rb->DataType = GL_UNSIGNED_BYTE;
cpp = 4;
break;
case GL_DEPTH_COMPONENT:
internalFormat = GL_DEPTH24_STENCIL8_EXT;
rb->DepthBits = 24;
rb->InternalFormat = GL_DEPTH24_STENCIL8_EXT;
rb->DataType = GL_UNSIGNED_BYTE;
rb->DepthBits = 24;
cpp = 4;
break;
case GL_STENCIL_INDEX:
internalFormat = GL_STENCIL_INDEX8_EXT;
rb->StencilBits = 8;
rb->InternalFormat = GL_STENCIL_INDEX8_EXT;
rb->DataType = GL_UNSIGNED_BYTE;
rb->StencilBits = 8;
cpp = 1;
softwareBuffer = GL_TRUE;
/* XXX software buffer? */
break;
case GL_DEPTH_STENCIL_EXT:
internalFormat = GL_DEPTH24_STENCIL8_EXT;
rb->InternalFormat = GL_DEPTH24_STENCIL8_EXT;
rb->DataType = GL_UNSIGNED_INT;
rb->DepthBits = 24;
rb->StencilBits = 8;
rb->DataType = GL_UNSIGNED_INT;
cpp = 4;
break;
default:
@ -192,7 +192,6 @@ intel_alloc_storage(GLcontext *ctx, struct gl_renderbuffer *rb,
return GL_FALSE; /* out of memory? */
}
rb->InternalFormat = internalFormat;
rb->Width = width;
rb->Height = height;