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synced 2026-05-04 20:38:06 +02:00
intel: Rename gen_{pipeline, oa, counter, hw} to intel_{..}
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965 grep -E "gen_" -rIl $SEARCH_PATH | xargs sed -ie "s/gen_\(pipeline\|oa\|counter\|hw\)/intel_\1/g" Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10241>
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parent
b2ef2948a0
commit
5d7e7545ac
6 changed files with 38 additions and 38 deletions
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@ -777,10 +777,10 @@ def main():
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c_outdent(3)
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c("}\n")
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h("void gen_oa_register_queries_" + gen.chipset + "(struct intel_perf_config *perf);\n")
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h("void intel_oa_register_queries_" + gen.chipset + "(struct intel_perf_config *perf);\n")
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c("\nvoid")
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c("gen_oa_register_queries_" + gen.chipset + "(struct intel_perf_config *perf)")
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c("intel_oa_register_queries_" + gen.chipset + "(struct intel_perf_config *perf)")
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c("{")
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c_indent(3)
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@ -435,52 +435,52 @@ static perf_register_oa_queries_t
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get_register_queries_function(const struct intel_device_info *devinfo)
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{
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if (devinfo->is_haswell)
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return gen_oa_register_queries_hsw;
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return intel_oa_register_queries_hsw;
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if (devinfo->is_cherryview)
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return gen_oa_register_queries_chv;
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return intel_oa_register_queries_chv;
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if (devinfo->is_broadwell)
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return gen_oa_register_queries_bdw;
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return intel_oa_register_queries_bdw;
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if (devinfo->is_broxton)
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return gen_oa_register_queries_bxt;
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return intel_oa_register_queries_bxt;
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if (devinfo->is_skylake) {
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if (devinfo->gt == 2)
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return gen_oa_register_queries_sklgt2;
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return intel_oa_register_queries_sklgt2;
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if (devinfo->gt == 3)
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return gen_oa_register_queries_sklgt3;
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return intel_oa_register_queries_sklgt3;
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if (devinfo->gt == 4)
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return gen_oa_register_queries_sklgt4;
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return intel_oa_register_queries_sklgt4;
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}
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if (devinfo->is_kabylake) {
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if (devinfo->gt == 2)
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return gen_oa_register_queries_kblgt2;
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return intel_oa_register_queries_kblgt2;
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if (devinfo->gt == 3)
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return gen_oa_register_queries_kblgt3;
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return intel_oa_register_queries_kblgt3;
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}
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if (devinfo->is_geminilake)
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return gen_oa_register_queries_glk;
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return intel_oa_register_queries_glk;
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if (devinfo->is_coffeelake) {
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if (devinfo->gt == 2)
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return gen_oa_register_queries_cflgt2;
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return intel_oa_register_queries_cflgt2;
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if (devinfo->gt == 3)
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return gen_oa_register_queries_cflgt3;
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return intel_oa_register_queries_cflgt3;
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}
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if (devinfo->ver == 11) {
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if (devinfo->is_elkhartlake)
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return gen_oa_register_queries_ehl;
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return gen_oa_register_queries_icl;
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return intel_oa_register_queries_ehl;
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return intel_oa_register_queries_icl;
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}
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if (devinfo->is_tigerlake) {
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if (devinfo->gt == 1)
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return gen_oa_register_queries_tglgt1;
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return intel_oa_register_queries_tglgt1;
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if (devinfo->gt == 2)
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return gen_oa_register_queries_tglgt2;
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return intel_oa_register_queries_tglgt2;
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}
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if (devinfo->is_rocketlake)
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return gen_oa_register_queries_rkl;
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return intel_oa_register_queries_rkl;
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if (devinfo->is_dg1)
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return gen_oa_register_queries_dg1;
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return intel_oa_register_queries_dg1;
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if (devinfo->is_alderlake)
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return gen_oa_register_queries_adl;
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return intel_oa_register_queries_adl;
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return NULL;
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}
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@ -96,7 +96,7 @@ enum intel_perf_counter_units {
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INTEL_PERF_COUNTER_UNITS_MAX
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};
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struct gen_pipeline_stat {
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struct intel_pipeline_stat {
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uint32_t reg;
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uint32_t numerator;
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uint32_t denominator;
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@ -186,7 +186,7 @@ struct intel_perf_query_counter {
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float (*oa_counter_read_float)(struct intel_perf_config *perf,
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const struct intel_perf_query_info *query,
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const struct intel_perf_query_result *results);
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struct gen_pipeline_stat pipeline_stat;
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struct intel_pipeline_stat pipeline_stat;
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};
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};
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@ -1,4 +1,4 @@
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gen_hw_metrics = [
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intel_hw_metrics = [
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'hsw',
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'bdw', 'chv',
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'sklgt2', 'sklgt3', 'sklgt4',
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@ -9,9 +9,9 @@ gen_hw_metrics = [
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'tglgt1', 'tglgt2', 'rkl', 'dg1', 'adl',
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]
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gen_hw_metrics_xml_files = []
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foreach hw : gen_hw_metrics
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gen_hw_metrics_xml_files += 'oa-@0@.xml'.format(hw)
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intel_hw_metrics_xml_files = []
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foreach hw : intel_hw_metrics
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intel_hw_metrics_xml_files += 'oa-@0@.xml'.format(hw)
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endforeach
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intel_perf_sources = [
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@ -22,7 +22,7 @@ intel_perf_sources = [
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intel_perf_sources += custom_target(
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'intel-perf-sources',
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input : gen_hw_metrics_xml_files,
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input : intel_hw_metrics_xml_files,
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output : [ 'intel_perf_metrics.c', 'intel_perf_metrics.h' ],
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command : [
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prog_python, files('gen_perf.py'),
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@ -348,25 +348,25 @@ VkResult anv_EnumeratePhysicalDeviceQueueFamilyPerformanceQueryCountersKHR(
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VK_OUTARRAY_MAKE(out_desc, pCounterDescriptions, &desc_count);
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for (int c = 0; c < (perf ? perf->n_counters : 0); c++) {
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const struct intel_perf_query_counter *gen_counter = perf->counter_infos[c].counter;
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const struct intel_perf_query_counter *intel_counter = perf->counter_infos[c].counter;
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vk_outarray_append(&out, counter) {
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counter->unit = intel_perf_counter_unit_to_vk_unit[gen_counter->units];
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counter->unit = intel_perf_counter_unit_to_vk_unit[intel_counter->units];
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counter->scope = VK_QUERY_SCOPE_COMMAND_KHR;
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counter->storage = intel_perf_counter_data_type_to_vk_storage[gen_counter->data_type];
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counter->storage = intel_perf_counter_data_type_to_vk_storage[intel_counter->data_type];
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unsigned char sha1_result[20];
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_mesa_sha1_compute(gen_counter->symbol_name,
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strlen(gen_counter->symbol_name),
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_mesa_sha1_compute(intel_counter->symbol_name,
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strlen(intel_counter->symbol_name),
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sha1_result);
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memcpy(counter->uuid, sha1_result, sizeof(counter->uuid));
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}
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vk_outarray_append(&out_desc, desc) {
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desc->flags = 0; /* None so far. */
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snprintf(desc->name, sizeof(desc->name), "%s", gen_counter->name);
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snprintf(desc->category, sizeof(desc->category), "%s", gen_counter->category);
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snprintf(desc->description, sizeof(desc->description), "%s", gen_counter->desc);
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snprintf(desc->name, sizeof(desc->name), "%s", intel_counter->name);
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snprintf(desc->category, sizeof(desc->category), "%s", intel_counter->category);
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snprintf(desc->description, sizeof(desc->description), "%s", intel_counter->desc);
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}
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}
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@ -172,7 +172,7 @@ intel_counter_type_enum_to_gl_type(enum intel_perf_counter_type type)
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}
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static GLuint
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gen_counter_data_type_to_gl_type(enum intel_perf_counter_data_type type)
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intel_counter_data_type_to_gl_type(enum intel_perf_counter_data_type type)
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{
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switch (type) {
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case INTEL_PERF_COUNTER_DATA_TYPE_BOOL32: return GL_PERFQUERY_COUNTER_DATA_BOOL32_INTEL;
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@ -212,7 +212,7 @@ brw_get_perf_counter_info(struct gl_context *ctx,
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*offset = counter->offset;
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*data_size = intel_perf_query_counter_get_size(counter);
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*type_enum = intel_counter_type_enum_to_gl_type(counter->type);
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*data_type_enum = gen_counter_data_type_to_gl_type(counter->data_type);
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*data_type_enum = intel_counter_data_type_to_gl_type(counter->data_type);
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*raw_max = counter->raw_max;
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}
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