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radv: create descriptors for color/depth-stencil surfaces earlier

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For less CPU overhead when rendering begins and also because it's
easy to pre-compute those descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38714>
This commit is contained in:
Samuel Pitoiset 2025-11-28 08:58:52 +01:00 • committed by Marge Bot
parent c8729cdd3c
commit 5d76202b6d
3 changed files with 27 additions and 3 deletions
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7
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -10037,7 +10037,7 @@ radv_CmdBeginRendering(VkCommandBuffer commandBuffer, const VkRenderingInfo *pRe
color_att[i].iview = iview; color_att[i].iview = iview;
color_att[i].flags = get_rendering_attachment_flags(pRenderingInfo, att_info); color_att[i].flags = get_rendering_attachment_flags(pRenderingInfo, att_info);
color_att[i].layout = get_image_layout(att_info); color_att[i].layout = get_image_layout(att_info);
radv_initialise_color_surface(device, &color_att[i].cb, iview); color_att[i].cb = iview->color_desc;
if (att_info->resolveMode != VK_RESOLVE_MODE_NONE && att_info->resolveImageView != VK_NULL_HANDLE) { if (att_info->resolveMode != VK_RESOLVE_MODE_NONE && att_info->resolveImageView != VK_NULL_HANDLE) {
color_att[i].resolve_mode = att_info->resolveMode; color_att[i].resolve_mode = att_info->resolveMode;
@ -10113,12 +10113,15 @@ radv_CmdBeginRendering(VkCommandBuffer commandBuffer, const VkRenderingInfo *pRe
ds_att_aspects = VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT; ds_att_aspects = VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT;
ds_att.flags = get_rendering_attachment_flags(pRenderingInfo, d_att_info) | ds_att.flags = get_rendering_attachment_flags(pRenderingInfo, d_att_info) |
get_rendering_attachment_flags(pRenderingInfo, s_att_info); get_rendering_attachment_flags(pRenderingInfo, s_att_info);
ds_att.ds = ds_att.iview->depth_stencil_desc;
} else if (d_iview) { } else if (d_iview) {
ds_att_aspects = VK_IMAGE_ASPECT_DEPTH_BIT; ds_att_aspects = VK_IMAGE_ASPECT_DEPTH_BIT;
ds_att.flags = get_rendering_attachment_flags(pRenderingInfo, d_att_info); ds_att.flags = get_rendering_attachment_flags(pRenderingInfo, d_att_info);
ds_att.ds = ds_att.iview->depth_only_desc;
} else { } else {
ds_att_aspects = VK_IMAGE_ASPECT_STENCIL_BIT; ds_att_aspects = VK_IMAGE_ASPECT_STENCIL_BIT;
ds_att.flags = get_rendering_attachment_flags(pRenderingInfo, s_att_info); ds_att.flags = get_rendering_attachment_flags(pRenderingInfo, s_att_info);
ds_att.ds = ds_att.iview->stencil_only_desc;
} }
if (pdev->info.gfx_level >= GFX12) { if (pdev->info.gfx_level >= GFX12) {
@ -10127,8 +10130,6 @@ radv_CmdBeginRendering(VkCommandBuffer commandBuffer, const VkRenderingInfo *pRe
has_hiz_his = surf->u.gfx9.zs.hiz.offset || surf->u.gfx9.zs.his.offset; has_hiz_his = surf->u.gfx9.zs.hiz.offset || surf->u.gfx9.zs.his.offset;
} }
radv_initialise_ds_surface(device, &ds_att.ds, ds_att.iview, ds_att_aspects);
assert(d_res_iview == NULL || s_res_iview == NULL || d_res_iview == s_res_iview); assert(d_res_iview == NULL || s_res_iview == NULL || d_res_iview == s_res_iview);
ds_att.resolve_iview = d_res_iview ? d_res_iview : s_res_iview; ds_att.resolve_iview = d_res_iview ? d_res_iview : s_res_iview;

13
src/amd/vulkan/radv_image_view.c
View file

@ -641,6 +641,19 @@ radv_image_view_init(struct radv_image_view *iview, struct radv_device *device,
radv_image_view_make_descriptor(iview, device, format, &pCreateInfo->components, true, disable_compression, radv_image_view_make_descriptor(iview, device, format, &pCreateInfo->components, true, disable_compression,
enable_compression, iview->plane_id + i, i, sliced_3d); enable_compression, iview->plane_id + i, i, sliced_3d);
} }
if (iview->vk.usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)
radv_initialise_color_surface(device, &iview->color_desc, iview);
if (iview->vk.usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT) {
if (vk_format_has_depth(image->vk.format) && vk_format_has_stencil(image->vk.format))
radv_initialise_ds_surface(device, &iview->depth_stencil_desc, iview,
VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT);
if (vk_format_has_depth(image->vk.format))
radv_initialise_ds_surface(device, &iview->depth_only_desc, iview, VK_IMAGE_ASPECT_DEPTH_BIT);
if (vk_format_has_stencil(image->vk.format))
radv_initialise_ds_surface(device, &iview->stencil_only_desc, iview, VK_IMAGE_ASPECT_STENCIL_BIT);
}
} }
void void

10
src/amd/vulkan/radv_image_view.h
View file

@ -47,6 +47,16 @@ struct radv_image_view {
/* Block-compressed image views on GFX10+. */ /* Block-compressed image views on GFX10+. */
struct ac_surf_nbc_view nbc_view; struct ac_surf_nbc_view nbc_view;
union {
struct radv_color_buffer_info color_desc;
struct {
struct radv_ds_buffer_info depth_stencil_desc;
struct radv_ds_buffer_info depth_only_desc;
struct radv_ds_buffer_info stencil_only_desc;
};
};
}; };
VK_DEFINE_NONDISP_HANDLE_CASTS(radv_image_view, vk.base, VkImageView, VK_OBJECT_TYPE_IMAGE_VIEW); VK_DEFINE_NONDISP_HANDLE_CASTS(radv_image_view, vk.base, VkImageView, VK_OBJECT_TYPE_IMAGE_VIEW);