diff --git a/.pick_status.json b/.pick_status.json index 1eb1adead67..270dead01cb 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -355,7 +355,7 @@ "description": "pan/mdg: Fill from TLS before spilling non-SSA nodes", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null }, diff --git a/src/panfrost/midgard/midgard_ra.c b/src/panfrost/midgard/midgard_ra.c index c6e97b7b752..e42f637e57a 100644 --- a/src/panfrost/midgard/midgard_ra.c +++ b/src/panfrost/midgard/midgard_ra.c @@ -845,8 +845,14 @@ mir_spill_register( /* For special reads, figure out how many bytes we need */ unsigned read_bytemask = 0; + /* If multiple instructions write to this destination, we'll have to + * fill from TLS before writing */ + unsigned write_count = 0; + mir_foreach_instr_global_safe(ctx, ins) { read_bytemask |= mir_bytemask_of_read_components(ins, spill_node); + if (ins->dest == spill_node) + ++write_count; } /* For TLS, replace all stores to the spilled node. For @@ -879,7 +885,15 @@ mir_spill_register( mir_insert_instruction_after_scheduled(ctx, block, ins, st); } else { - ins->dest = spill_index++; + unsigned dest = spill_index++; + + if (write_count > 1 && mir_bytemask(ins) != 0xF) { + midgard_instruction read = + v_load_store_scratch(dest, spill_slot, false, 0xF); + mir_insert_instruction_before_scheduled(ctx, block, ins, read); + } + + ins->dest = dest; ins->no_spill |= (1 << spill_class); midgard_instruction st =